Venkatesh Hanamsagar

Software Engineer

Bengaluru, Karnataka, India18 yrs 3 mos experience

Key Highlights

Expert in RTL design and ASIC development.
Strong background in VLSI and digital design.
Proficient in multiple programming languages including Verilog and C++.

Stackforce AI infers this person is a Semiconductor Design Engineer with expertise in VLSI and digital systems.

Contact

Skills

Core Skills

Rtl DesignAsic

Other Skills

CC/C++Cadence VirtuosoComputer ArchitectureDebuggingDesign CompilerDigital DesignEmbedded SystemsIntegrated Circuit DesignLinuxMatlabModelSimPerlSoCSystem Verilog

About

Specialties: VLSI, Digital Design, Computer Architecture

Experience

Google

Senior RTL Design Engineer

Oct 2025 – Present · 5 mos · Bengaluru, Karnataka, India

Amd

Senior Member of Technical Staff

Apr 2024 – Oct 2025 · 1 yr 6 mos · Bengaluru, Karnataka, India · On-site

Intel corporation

Logic Design Engineering Manager

Sep 2022 – Apr 2024 · 1 yr 7 mos

Qualcomm

2 roles

Staff Engineer

Sep 2021 – Sep 2022 · 1 yr

Lead Engineer, Sr

Sep 2017 – Sep 2021 · 4 yrs

Marvell semiconductor

2 roles

Senior ASIC Design Engineer

Promoted

Jun 2014 – Sep 2017 · 3 yrs 3 mos

Worked on RTL design and implementation in Verilog.
Worked on system level architecture specification and implementation.
Worked on simulation and debugging in UVM simulation environment with MTI and VCS simulators.
Worked on synthesis using Design Compiler.
Worked on development of design and register level specification.
Worked on debugging customer issues and replicate issues in verification environment.

VerilogSystem VerilogRTL designDebuggingUVM simulationDesign Compiler+1