Richa Garg

Software Engineer

Bengaluru, Karnataka, India18 yrs 1 mo experience
Highly Stable

Key Highlights

  • Experienced Principal Engineer with extensive expertise in VLSI and ASIC design.
  • Proven track record in functional verification and integrated circuit design.
  • Strong background in DFT methodologies and debugging techniques.
Stackforce AI infers this person is a semiconductor design expert with a focus on VLSI and ASIC technologies.

Contact

LinkedIn

Skills

Core Skills

Functional VerificationSoc

Other Skills

VLSIVerilogASICDFTATPGRTL designBISTNCSimJTAGICIntegrated Circuit DesignCMOSApplication-Specific Integrated Circuits (ASIC)Debugging

Experience

18 yrs 1 mo
Total Experience
3 yrs 5 mos
Average Tenure
11 mos
Current Experience

Marvell technology

Principal Engineer

May 2025 – Present · 11 mos · Bengaluru, Karnataka, India · On-site

Functional VerificationSoCVLSIVerilogASICDFT+10

Intel corporation

Senior DFT Engineer

May 2022 – May 2025 · 3 yrs · Bangalore Urban, Karnataka, India · Hybrid

Nxp semiconductors

Principal Engineer

Oct 2020 – May 2022 · 1 yr 7 mos · Bengaluru, Karnataka, India

Amd

Member of Technical Staff

Aug 2016 – Oct 2020 · 4 yrs 2 mos · Bengaluru, Karnataka, India

Marvell semiconductor

DFT Lead

Nov 2014 – Jan 2016 · 1 yr 2 mos · Bangalore

Freescale semiconductor

3 roles

Lead Design Engineer

Nov 2013 – Nov 2014 · 1 yr

Lead Design Engineer

Promoted

Apr 2013 – Nov 2013 · 7 mos

Sr. Design Engineer

Jul 2007 – Mar 2013 · 5 yrs 8 mos

Education

Indian Institute of Management Bangalore

Executive General Management Programme(EGMP 34)

Jan 2015 – Jan 2016

Thapar Institute of Engineering & Technology

Jan 2003 – Jan 2007

Indian Institute of Management Bangalore

Indian Institute of Management Bangalore

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