Dec 2021 – Apr 2024 · 2 yrs 4 mos

• Working in the Graphics systems team. Involved in the following activities:
• Development of a cycle accurate performance model simulator (SystemC based) for the analysis of future generation GPUs.
• Correlation of performance data obtained from the above model with Pre-Si data.
• Analysis of graphics workloads to identify architecture limitations and provide appropriate solutions.
• Working closely with architects to design and drive new feature development for optimal GPU performance and power consumption.
• Development of tools and scripts (Perl and Python based) that help in the analysis and comparison of performance counters obtained from different platforms.
• Parallelly, drove the development of a performance simulator which allows co-simulating blocks coded in a high-level language (SystemC/C++) with blocks more accurately coded in RTL. This model allows in making feature changes and observing its impact on overall GPU performance with small turnaround times

Dec 2019 – Dec 2021 · 2 yrs

Aug 2017 – Dec 2019 · 2 yrs 4 mos

Feb 2016 – Aug 2017 · 1 yr 6 mos · Malaysia

• Worked as a front-end RTL design engineer and integrator for different System on Chip (SoC) projects.
• Designed, tested and integrated an interrupt controller for the imaging unit of a SoC.
• Owned the integration of fabrics (communication infrastructure) in a client based SoC.
• Involved in the unified power format (UPF) design of the above components.

Sep 2014 – Aug 2015 · 11 mos · Netherlands

• Involved in the modelling and analysis of a ring interconnect (RI) fabric that will be used in future generation Image processing units.
• 1) Developed C++ models of various components of the RI in accordance with proprietary communication protocols.
• 2) Implemented a flexible C++ model used to test and monitor the performance of the RI using real world scenarios.
• 3) Used the models for cycle accurate simulations to perform Design Space Exploration and determine optimal configurations of the RI for different traffic scenarios.
• 4) Created Perl scripts to automate pre and post simulation processing.

Jul 2011 – Jul 2013 · 2 yrs · Bangalore, India

• My job description entails developing tools that aid in simulating the Engine Control Unit (ECU) of a car, to test various functionalities such as anti-lock braking (ABS), Hill Hold Control (HHC), DSC and more.
• 1) I was given the opportunity to design and develop a measurement technique that is used to measure the signal data entering or leaving the ECU during Software in loop (SiL) simulations (Open loop and Closed loop).
• 2) I also developed tools that are used to speed up test cases. For example, I developed a tool that is used to compare the signals of an ECU after different runs of simulations; thereby eliminating unnecessary time and effort.
• 3) The Make Tool Chain (MTC) is a set of tools that are used to build the ECU software. Depending on the type of build required these tools are called in a particular order. Developed a platform (Using Windows PowerShell) that:
• Builds one or two different projects with specified MTC versions.
• Simulates the projects and then compares the simulation output files.