PRASENJIT CHAKRABORTY

CTO

Vancouver, British Columbia, Canada22 yrs 4 mos experience

Highly Stable

Key Highlights

Expert in Computer Architecture and Embedded Systems.
Led performance engineering for Intel's Optane SSD products.
Architected memory solutions for EXAFLOPS Supercomputer.

Stackforce AI infers this person is a Semiconductor and Data Center expert with a focus on performance engineering and architecture.

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Skills

Core Skills

Computer ArchitectureEmbedded SystemsPerformance EngineeringCpu ArchitectureSoc DesignGpu ArchitectureMemory ArchitectureCpu DesignProcessor Architecture

Other Skills

ARMAlgorithmsAnalysisArchitectureCC++CPU PerformanceChiplet PlatformCompilersDDR5DebuggingDevice DriversEnergy Efficient DesignFile SystemsGPGPU

Experience

Dreambig semiconductor inc.

Principal Interconnect and Memory Architect

Sep 2021 – Present · 4 yrs 6 mos · Vancouver, British Columbia, Canada

Principal architect for On Chip Interconnect and Memory (DDR5 & HBM3/3E) for Dreambig MARS Chiplet Platform

Computer ArchitectureEmbedded SystemsDDR5HBM3Chiplet Platform

Intel corporation

5 roles

SSD ASIC Controller Performance Engineer

Jan 2019 – Sep 2021 · 2 yrs 8 mos

I am leading a team of engineers to architect and improve ARM based CPU cluster performance that are used in Intel's latest and upcoming Optane SSD products used in Data Centers. I am driving performance modeling, analysis and evaluation techniques to closely simulate HW-SW system interactions through various CPU interfaces. Analysis involves modeling traditional architecture and programmable accelerators for the flexible and scalable design.

ARMCPU PerformancePerformance ModelingHW-SW System InteractionsPerformance EngineeringCPU Architecture

SoC Architect

Promoted

Aug 2016 – Dec 2018 · 2 yrs 4 mos

Architecting next generation Xeon server SoC

SoC ArchitectureXeon ServerSoC DesignComputer Architecture

Performance Engineering Lead (Manager)

Aug 2015 – Sep 2016 · 1 yr 1 mo

Intel GPU performance simulator development and performance analysis for GPGPU and memory cluster

GPU PerformancePerformance AnalysisGPGPUPerformance EngineeringGPU Architecture

Senior Architect - Exascale Memory System

Jul 2014 – Aug 2015 · 1 yr 1 mo

Memory subsystem design for EXAFLOPS Supercomputer architecture funded by Department of Energy (DOE).

Memory System DesignSupercomputer ArchitectureMemory ArchitectureComputer Architecture

Senior Performance Engineer - CPU Design

May 2011 – Jun 2014 · 3 yrs 1 mo

Drive innovations to design energy efficient memory architecture

Energy Efficient DesignMemory ArchitectureCPU Design

Ibm

Senior Staff Software Engg

Jan 2003 – Jun 2011 · 8 yrs 5 mos

Processor Performance Modeling & Analysis

Processor Performance ModelingAnalysisPerformance EngineeringProcessor Architecture

Winphoria networks india pvt ltd

Member of Technical Staff

Mar 2001 – Jan 2003 · 1 yr 10 mos · Bangalore

Hcl technologies

MTS

Jan 1999 – Jan 2001 · 2 yrs

Fortran Compiler Optimization

Education

Indian Institute of Technology, Delhi

Doctor of Philosophy (PhD) — Computer Architecture

Jan 2007 – Jan 2014

Indian Institute of Technology (Banaras Hindu University), Varanasi

Bachelor Of Technology — Electrical Engg

Jan 1995 – Jan 1999

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