Ashin George

Software Engineer

San Diego, California, United States12 yrs 1 mo experience

Most Likely To SwitchHighly Stable

Key Highlights

Expertise in ARM architecture and functional verification.
Strong background in machine learning and data analysis.
Proven track record in developing automation frameworks.

Stackforce AI infers this person is a Semiconductor and AI specialist with a focus on functional verification and machine learning.

Contact

Skills

Core Skills

Functional VerificationMicroprocessorsAutomationMicroprocessor Validation

Other Skills

ARM ArchitectureAlgorithmsArm ArchitectureArtificial Neural NetworksBig DataCC (Programming Language)C++CUDACadence VirtuosoComputer ArchitectureComputer VisionData AnalysisData StructuresDebugging

About

I am a Computer Science graduate student at University of California - San Diego specializing in Artificial Intelligence and Machine Learning. I was Senior Engineer at ARM, Bangalore before joining UCSD.

Experience

Google

Software Engineer

Aug 2019 – Present · 6 yrs 7 mos · San Francisco Bay Area

Oracle labs

Machine Learning Research Intern

Jun 2018 – Sep 2018 · 3 mos

University of california san diego

Graduate Teaching Assistant

Apr 2018 – Jun 2019 · 1 yr 2 mos · San Diego County, California, United States

Arm

4 roles

Senior Engineer

Promoted

Apr 2017 – Aug 2017 · 4 mos

I worked as a part of the Architecture and Technology Group at ARM.
I was primarily responsible for the top level functional verification of ARM microprocessors using Random Instruction Sequence (RIS) tools.
ARM v8-A RIS Template Library: Created templates to generate constrained-random stimulus for verifying ARM v8 architectural scenarios for ARM and partner CPUs
RIS Verification of ARM v8/v8.1/v8.2 Cortex designs: Stimulus development targeting micro- architectural features of ARM internal designs. Served as the point of contact between RIS tool development team and CPU design verification teams
MPRIS Tool Development: Profiling, coding and testing of the multi-core RIS tool used by ARM & licensees. Developed the internal cpu model for test simulation

Functional VerificationMicroprocessorsRandom Instruction Sequence (RIS)ARM Architecture

Engineer

Jan 2015 – Mar 2017 · 2 yrs 2 mos

Graduate Engineer

Jul 2013 – Dec 2014 · 1 yr 5 mos

ARM Cortex-A12/Cortex-A17 Top-level RIS Verification
Deployed RAVEN (RIS verification tool) and created stimulus for architectural and micro-architectural scenarios
Found critical RTL bugs resulting in RAVEN becoming the primary RIS tool

Functional VerificationMicroprocessorsRAVEN (RIS verification tool)

Intern

Jan 2013 – Jun 2013 · 5 mos

Automation of Advanced Microprocessor Validation Flow : Developed a Perl framework to automate the top level microprocessor validation flow used in the CPU verification teams. Added regression management coverage reporting.

PerlAutomationMicroprocessor Validation

Madras atomic power station

Intern

May 2011 – Jul 2011 · 2 mos · Kalpakkam, Chennai, India

Study of the High Tension Three Phase Induction Motors which are used in Boiler Feed Pump and
Primary Coolant Pump of Madras Atomic Power Plant
Study of the Electrical System in MAPS