Yatiraj Tantri Paniyoor

Director of Engineering

Bengaluru, Karnataka, India21 yrs 3 mos experience

Highly Stable

Key Highlights

Expert in WiFi/BT Digital PHY architecture and design.
Proven track record in team leadership and technical management.
Extensive experience in ASIC design and verification.

Stackforce AI infers this person is a Telecommunications expert with a strong focus on PHY design and ASIC development.

Contact

Skills

Core Skills

Phy DesignArchitectureDesignVerification

Other Skills

802.11a/b/g/n/ac802.11ac802.11axARMASICApplication-Specific Integrated Circuits (ASIC)CMOSDebuggingDigital Signal ProcessorsEDAFPGAFormal VerificationFunctional VerificationHardware ArchitectureIntegrated Circuit Design

About

Responsible for the complete cycle of WiFi/BT Digital PHY architecture, design and productization. Experienced in seeding teams and technical/people management.

Experience

Synaptics incorporated

2 roles

Senior Director

Promoted

Mar 2025 – Present · 1 yr · Bengaluru, Karnataka, India

Director, ASIC Design

Jul 2022 – Mar 2025 · 2 yrs 8 mos · Bengaluru, Karnataka, India

Qualcomm

4 roles

Principal Engineer / Manager

Nov 2019 – Jun 2022 · 2 yrs 7 mos

PHY design lead for 802.11be AP, responsible for architecture, design and supporting verification/emulation/silicon-bring-up/customer sampling.
Leading the PHY design team in India, responsible for hiring and growth.

PHY designarchitecturedesignverificationemulationsilicon-bring-up+1

Senior Staff Manager

Promoted

Nov 2016 – Oct 2019 · 2 yrs 11 mos

Design/Architecture of 802.11ac/ax PHY sub-blocks.
Seeded the design team.

designarchitecture802.11ac802.11axteam seeding

Staff Engineer

Nov 2014 – Oct 2016 · 1 yr 11 mos

Senior Lead Engineer

Feb 2013 – Oct 2014 · 1 yr 8 mos

Broadcom

Senior Staff, IC Design

May 2006 – Feb 2013 · 6 yrs 9 mos

Design and Verification of the first generation 802.11a/b/g/n/ac SISO/MIMO PHY.
Experience primarily in Area/Power optimal PHY design.
WLAN-LTE Coexistence development: Ramped-up and lead a team of 4 engineers.

Amcc india

ASIC Design Engineer

Jul 2004 – Mar 2006 · 1 yr 8 mos

Verification of SOC integration.
Verification of CAN(Control Area Network) protocol interface.
Verification of PRBS sequences, this included generating valid sequences and identifying the positions in a SONET/STS frame where the sequences are sent.

designverification802.11a/b/g/n/acWLAN-LTE Coexistence