Devesh Pareek — Software Engineer
Skilled in Verilog and VHDL coding with strog knowledge of electronics and rtl coding, with a Bachelor of Technology - BTech focused in Electrical Engineering from National Institute of Technology Durgapur.
Stackforce AI infers this person is a skilled FPGA Engineer with expertise in digital design and electronics.
Location: Gurugram, Haryana, India
Experience: 7 yrs 10 mos
Skills
- Digital Logic
- Product Requirement Definition
Career Highlights
- Expert in Verilog and VHDL coding.
- Strong background in digital logic and electronics.
- Proven experience in FPGA engineering and RTL design.
Work Experience
Logic Fruit Technologies
Senior Research And Development Engineer (1 yr 11 mos)
Research And Development Engineer (2 yrs 4 mos)
R and D Engineer trainee (5 mos)
Aarohan, NIT Durgapur
Senior Fest Coordinator (1 yr 11 mos)
Entrepreneurship Cell, CCA, NIT DURGAPUR
Senior Member (3 yrs 3 mos)
Education
Bachelor of Technology - BTech at National Institute of Technology Durgapur
BTech at National Institute of Technology Durgapur
Intermediate at Central Academy Jodhpur Education Society
