Amol Bharat Ranadivé

Co-Founder

Pune, Maharashtra, India16 yrs 11 mos experience
Most Likely To SwitchHighly Stable

Key Highlights

  • Expert in FPGA design and embedded systems.
  • Proven track record in IoT and robotics solutions.
  • Strong background in ASIC migration and validation.
Stackforce AI infers this person is a highly skilled FPGA and Embedded Systems Engineer with expertise in IoT and Robotics.

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Skills

Core Skills

FpgaEmbedded Systems

Other Skills

FPGA DesignEmulationRoboticsIoT SolutionsASIC migrationIOT-component controllerFPGA toolsVerilogARM Cortex-MJavaCCryptographyData CompressionFPGA-based controllerVHDL

About

Digital design, Verification, Embedded-system development & prototyping/ validation & Emulation on FPGAs, Product development, Robotics and IoT solutions

Experience

Escicomp-india

VLSI/FPGA Engineer (Consulting for AcclivisTech)

Sep 2019Sep 2019 · 0 mo · Pune/Pimpri-Chinchwad Area

  • Shared Information about type of skills that is required to solve FPGA based projects that Acclivis wasn;t able to close potential IoT and Technology development projects for their client. Lack of required talent was identified and offered to contribute through skills and training on need basis through services under our organisation then - EsciComp-India.

Esicompute india pvt ltd (formerly escicomp)

Engineering Specialist - VLSI/FPGA, Robotics and IoT solutions

Nov 2017Present · 8 yrs 4 mos · Pune/Pimpri-Chinchwad Area

  • FPGA Design, Emulation and platform development - ASIC migration
  • Educational & Industrial useful hardware/software tools, development platforms
  • Embeddes Systems application, product development
  • Robotics Solution with AI processing
  • IoT Solutions
FPGA DesignEmulationEmbedded SystemsRoboticsIoT SolutionsFPGA

Self employed

Technical Consultant

Oct 2013Oct 2014 · 1 yr

  • Autonomous Vehicle Controller on FPGA:
  • FPGA based controller for vehicle navigation for autonomous control over predetermined route through instructions.
  • Autonomous Controller is capable of enabling forward movement and steering control following to the route definition.
  • Pulse Wave Modulation control signal generation on FPGA using VHDL
  • Design of controller protocol and processor/interpreter using VHDL
  • Data structure design for Vehicle navigation data-base.
  • Serial protocol for transfer of data from pc/laptop across to local storage of DATA
  • Compiler for navigation instruction to navigation-database in C programming
  • Network Bridge for 12X10Gig MAC to 100 G Mac on Xilinx Virtex-7.
  • Xilinx cores for 10G Ethernet MAC, FIFOs for Interfaces and buffers Designed & Implemented Round Robin Arbiter for 12 Ports for Upstream, Forwarding table with fast search algorithm for destination MAC address lookup for Downstream.
  • Analysis for test-environment requirements to exercise DUT onto FPGA
  • Migrate simulation environment onto Verilog FPGA-board & host-PC software application
  • Migration of DPI-C based verification-IP modules onto synthesizable HDL & pre-function software routines in C++
FPGA-based controllerVHDLC programmingNetwork Bridge designFPGA

Self-employed

2 roles

Technical Consultant - R&D FPGA Design for Snved DA

Jan 2010May 2011 · 1 yr 4 mos

  • VLSI/FPGA based design projects from Spec to final prototype.
  • ASIC to FPGA migration.
  • Software & Hardware Integration

Consultant for Insilica

Nov 2007May 2008 · 6 mos

  • ASIC to FPGA Migration for dual ARM based SOC. Synthesis, PAR & timing closure.

(self employed)

VLSI/FPGA & Embedded System Consultant

Oct 2007Oct 2017 · 10 yrs · Pune

  • IOT-component controller module for camera-sensor & Ethernet interface
  • FPGA tools and simulators for HDL. Spartan-6 FPGA development-board. MicroCAM-II, ARM CortexM board, Keil, Java & C.
  • Camera-Sensor controller and communication protocol controller in FPGA for interface with ARM cortex-M processor. Ethernet and HTTP protocol interface controller with ARM cortex-M processor development-board. Java & C programming for user interface application.
  • High Performance Computing Application with FPGA
  • 1. Data & Control Flow For Cryptography Algorithms in analysis and serurity
  • 2. Offload CPU Intensive softare function(s) to FPGA for high speed algorithms such as search and data-compression.
  • Dual-PCIe based Auxiliary Control & Peripheral Interface for Network
  • Node.
  • Verilog & Spectre for RTL modeling. Perl for UCF & RTL automation.
  • Xilinx ISE-14.4 & Coregen, Synopsys-VCS simulator. Target to Xilinx Spartan5 150T FPGA.
  • Auxiliary set of independent peripheral controls and interfaces for Network-node
  • device.
  • Peripheral controller through twin PCIe core & included designing for following component
  • modules
  • 1. 3 SPI Master for controller to external peripherals
  • 2. 2 parameter polling & update controller based on I2C slave controller
  • 3. 4 MDIO based controls
  • 4. 6 I2C master controller
  • 5. Twin target (data-path) FPGA configuration in Slave Serial Mode
  • 6. Fault-Insertion & Detection Logic
  • 7. Internal interrupt controller
  • 8. I2C slave based debug interface as backdoor
  • 9. Arbiter implementation for access of I2C slave interface between 2 registers bank
  • 10. Autonomous Environment monitor and control
IOT-component controllerFPGA toolsVerilogARM Cortex-MJavaC+2

Conexant

Lead Design Engineer

Apr 2007Sep 2007 · 5 mos

  • Post silicon validation, test-setup and testing for Network-Processor in Conexant-BBA group at Pune.

Aftek

VLSI Engineer

Jan 2006Jan 2007 · 1 yr

  • Design & Verification of FPGA based modules

Intelliprop inc.

Engineer

Jan 2005Jan 2006 · 1 yr

  • Verification of RTL modules in storage area network.

Synplicity pty ltd.

CAE

Jan 2004Jan 2005 · 1 yr

  • Support for Synplify-pro: FPGA synthesis tool. Test synthesis & UI applications.

Bit mapper integration technologies pvt. ltd.

Design Egnineer

Jan 2003Jan 2004 · 1 yr

  • FPGA based application/solution design implementation. Hardware and software development for end solutions in Communication/networking and control system.

Logic eastern

Hardware-Software Co-design

Sep 2001Jun 2003 · 1 yr 9 mos

  • RTL/FPGA based hardware design models and simulation. Software integration for verification.

Logic eastern

FPGA - co design engineer

Jan 2001Jan 2001 · 0 mo

Education

Sinhgad College Of Engineering, Pune

Master's Degree — Electronics (Digital Systems)

Jan 2011Jan 2013

Shivaji University

B.E. — Electronics

Jan 1996Jan 1999

Solapur

Walchand Institute Of Technologu — Electronics

Jan 1982Jan 1999

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