May 2019 – Dec 2019 · 7 mos · San Jose

Jun 2018 – Dec 2018 · 6 mos · United States

• Designing a malware detector choreographic microservice to protect an orchestration based microservice. Understanding the security issues introduced by splitting monolithic architecture into the large number of microservices which increases the difficulty in monitoring the holistic security of the application.

Aug 2016 – Dec 2017 · 1 yr 4 mos · Noida Area, India

• Developed of Record and Replay design for PCI-e transactions, Developed test cases for validating PASID and MSI features of PCI-e.

Apr 2014 – Jul 2016 · 2 yrs 3 mos

Mar 2011 – Apr 2014 · 3 yrs 1 mo

• In Qualcomm, my works are the RTL Integration of multiple CPU cores in big-LITTLE configurations, Attachment of asynchronous FIFOs in different interfaces, Hooking up CPU core interface level signals to peripherals, Resolving Clock domain Crossing concerns in the multi-clock subsystem, Creating power intent and ran CLP for multiple voltages in the subsystem, Designed Advanced fall through mechanism for CPU idle power manager, Designed configurable IP for CPU subsystem debug trace collection, Designed Performance Monitor counter design for performance emulation.