A

Aditya Sharma

Software Engineer

Bengaluru, Karnataka, India5 yrs 11 mos experience

Key Highlights

  • Led development of world's first heating pants for menstrual pain relief.
  • Ranked 2nd in IIT Roorkee Electrical Department.
  • Gold Medalist at Inter IIT Tech Meet.
Stackforce AI infers this person is a Hardware Engineer with expertise in IoT and GPU Design Verification.

Contact

Skills

Core Skills

Functional Design VerificationGpu Design VerificationIot Development

Other Skills

UVMSystemVerilogSVAVerdiPythonPerlTcl/TkEmbedded SystemsIoTCadence VirtuosoMATLABSimulinkVery-Large-Scale Integration (VLSI)C++SolidWorks

About

Total Citations: 26, h-index:2, i-10 index: 2 About Me? I have experience in all type of hardware system design: In-Memory Computing Architectures, FPGA, Mixed Signal Design, IoT, Embedded Systems and Electric Vehicles. My Experience? I have experience working in academia and industry through my research internships at UofT, USC and part time role at Ednam Solutions. Currently working at Qualcomm as GPU DV Engineer. I helped Ednam Solutions build an end-to-end consumer IoT device - LunaAlpha (World’s first Heating Pants for Menstrual Pain Relief) Research Interests: In-Memory Computing | Biomedical Electronics IEEE Student & CASS Member Former Electrical Head @ IIT Roorkee Motorsports IITR Electrical Department Rank-2 Won Encore Awards 2021 for Overall Excellence Gold Medal (Inter IIT Tech Meet 10.0) - Team Lead Silver Medal (Inter IIT Tech Meet 9.0)

Experience

Google

Silicon DV Engineer

Sep 2025Present · 6 mos · Bengaluru, Karnataka, India · On-site

Qualcomm

2 roles

Engineer

Promoted

Dec 2024Aug 2025 · 8 mos · Bengaluru, Karnataka, India · On-site

  • Driving Functional Design Verification of the GPU Clock Controller IP in Snapdragon SoCs using a SystemVerilog UVM-based testbench. Ensuring high-performance and reliable operation across flagship and mid-tier mobile/compute platforms.
  • Key Responsibilities:
  • Building scalable and reusable UVM environments.
  • Writing SVA-based assertions for timing and protocol checks.
  • Achieving complete code and functional coverage closure.
  • Debugging simulation failures using tools like Verdi.
  • Collaborating with architecture and design teams to ensure quality from spec to silicon.
  • Notable Skills: UVM, SystemVerilog, SVA, Verdi, Python, Perl, Tcl/Tk
UVMSystemVerilogSVAVerdiPythonPerl+3

Associate Engineer

Jun 2023Nov 2024 · 1 yr 5 mos · Bengaluru, Karnataka, India · On-site

  • GPU Design Verification - Emulation & Functional Verification

Ednam solutions pvt ltd

Embedded Systems Engineer

Jan 2023May 2023 · 4 mos · IIT Roorkee · On-site

University of southern california

2 roles

Research Volunteer

Aug 2022Jun 2023 · 10 mos

  • Delay Locked Loop (DLL) based fraction frequency Counter TDC for magnetic Bio-sensors.

IUSSTF Research Intern

May 2022Jul 2022 · 2 mos

  • Delay Locked Loop (DLL) based fraction frequency Counter TDC for magnetic Bio-sensors.

University of toronto

Summer Research Intern

May 2022Jul 2022 · 2 mos · Toronto, Ontario, Canada

  • Wireless Adaptive Powering Circuits for Neural Implants.

Iit roorkee motorsports

3 roles

Electrical Head

Apr 2022May 2023 · 1 yr 1 mo

Accumulator Head

Apr 2022May 2023 · 1 yr 1 mo

BMS Engineer

Feb 2020Apr 2022 · 2 yrs 2 mos

Ihub divyasampark @ iit roorkee

Chanakya UG Fellowship

Mar 2022Jan 2023 · 10 mos · IIT Roorkee

Academic reinforcement program - iit roorkee

UG Teaching Assistant

Dec 2020Mar 2021 · 3 mos

Nss iit roorkee

Deputy Cell Secretary

Jul 2020Jun 2021 · 11 mos · Roorkee, Uttarakhand, India

Education

Indian Institute of Technology, Roorkee

Bachelor of Technology - B.Tech — Electrical engineering

Jan 2019Jan 2023

Stackforce found 15 more professionals with Functional Design Verification & Gpu Design Verification

Explore similar profiles based on matching skills and experience