Dec 2018 – Jun 2024 · 5 yrs 6 mos · San Francisco Bay Area

• Driving the product management of Mixed Signal Verification and Mixed Signal Debug product portfolio of Siemens EDA. Develop and implement the product plans, product proliferation strategy, and Go-To-Market strategy, including planning the launch of new products and managing the execution of the plan by collaborating with cross-functional teams including product engineering and sales.
• Previously, lead the product marketing for the AMS & Solido (ML/AI) business unit which involved working with product management and enterprise marketing to develop and deliver messaging and communication strategies around our products as well as plans to deliver this to the market.

Jan 2017 – Dec 2018 · 1 yr 11 mos

• Lead the product marketing for Siemens ‘Analog Mixed Signal’ (AMS) Verification
• platform. Managed strategic project teams within PE & R&D to ensure key features
• are delivered on schedule for key products. Rolled out two new products in 2018
• averaging 2 million in yearly revenue. Managed beta and early access customer
• vetting, ran engagements and coordinated with the engineering team to ensure
• feedback was incorporated into the product. Drove the university relationship
• program – adding 5 new universities.

Nov 2012 – Nov 2017 · 5 yrs

• Drove Synopsys Verification Continuum product strategy and engage with sales teams to support Go-To-Market plans. Define and analyze key metrics to increase user adoption, engagement, and focus on user-centric solutions. I have managed up to 15 different accounts in the Networking, Wireless, Graphics, Digital Video, FPGA, and Custom Chip markets and delivered above quota every year.
• Define new development projects, requirements specifications PRDs, MRDs, and create internal and customer-consumable PowerPoint presentations and trainings.

May 2010 – Oct 2012 · 2 yrs 5 mos · Mountain View, CA

• Provide pre-sales strategy and technical support for Industry’s Open, Most Comprehensive, Debug Platform for Design and Verification.
• Supports Synopsys' debug solution, which is built on top of the Verdi3 advanced debug platform.
• Help customer solve complicated SoC debug problems.
• Also provide technical support and pre-sales strategies for wide selection of leading technologies such as
• Siloti, for advanced testbench debug
• Verdi3 Power-Aware Debug, for low power debug
• Verdi3 HW SW Debug, for instruction-accurate embedded processor debug

Nov 2005 – Apr 2010 · 4 yrs 5 mos · Mountain View , CA

• Provide pre-sales strategy and technical support, as well as organize worldwide AMS verification efforts as the Lead AC for a strategic account in the Storage & Networking space. I have managed up to 20 different accounts in the Networking, Wireless, Memory and Custom Chip markets and delivered above quota every year.
• Currently serving as North America West Product Line Lead for Synopsys Spice and FastSpice Simulation Technology. Responsible for collecting defect data and feedback from the field organization, work with R&D on quality, reliability, and priorities for new technology development in FastSpice.
• Deliver trainings, run evaluations and benchmark technologies in simulation, analog mixed signal verification domain.
• Perform internal testing, represent products at field conferences, streamline customer consumable material, provide internal training on key displacement campaigns and technologies, and create customer collateral including presentations, white papers, articles, demonstrations, and examples.

May 2004 – Oct 2005 · 1 yr 5 mos · Mountain View , CA

• Pre-sales and post-sales of EDA tools in the Analog and Mixed signal domain including HSPICE, FastSpice, Nanosim, HSIM

Apr 2002 – Jan 2004 · 1 yr 9 mos · AZ

• Design, Layout, implement, analyze, and test High-frequency analog/RF and digital circuits. • Used Cadence Virtuoso Platform • Scripting in TCL
• Highlight: First-generation UWB chip tape-out using TSMC 90nm CMOS