Ankur Pandey

Co-Founder

Bengaluru, Karnataka, India21 yrs 11 mos experience
Most Likely To SwitchHighly Stable

Key Highlights

  • Co-founder of a successful SaaS startup.
  • Led performance verification at top semiconductor companies.
  • MBA from a prestigious business school.
Stackforce AI infers this person is a SaaS entrepreneur with extensive experience in semiconductor engineering.

Contact

Skills

Core Skills

Product ManagementEntrepreneurshipPerformance VerificationVlsi

Other Skills

Product DevelopmentNew Business DevelopmentDesign ToolsMethodologiesTiming ClosurePower ClosureTechnical LeadershipParasitic ExtractionIR AnalysisEM AnalysisBuffer InsertionFlop PlacementInterconnect OptimizationEDAVLSI CAD

About

Ankur Pandey is a technologist turned entrepreneur who is passionate about frugal innovation. In his previous avatar he has managed and led high performing teams at Intel, AMD and Sun Microsystem. MBA from Indian School of Business (ISB) in Finance and Marketing. MS from University of Cincinnati & B.Tech from National Institute of Technology, Warangal (NITW).

Experience

21 yrs 11 mos
Total Experience
4 yrs 4 mos
Average Tenure
5 yrs 8 mos
Current Experience

Uolo.com

Co-Founder, Uolo.com

Aug 2020Present · 5 yrs 8 mos · Delhi, India

Uolo technology

Co-Founder and CEO at Uolo Technology

Jan 2014Aug 2020 · 6 yrs 7 mos · Bengaluru Area, India

  • Uolo is a funded cloud based Saas startup that allows educators to collaborate effectively with parents and children.
  • Listen to customer needs, define product vision and go-to-market strategy
  • Play rainmaker in new product sales
  • Misc jobs that no one else wants to do

Intel

2 roles

Engineering Manager

Jan 2011Apr 2012 · 1 yr 3 mos

  • Responsible for Performance verification tools, flows and methodologies.
  • Come up with strategic direction for the team and ensure timely delivery of all design tools and flows.

Sr Design Automation Engineer

Aug 2008Jan 2011 · 2 yrs 5 mos

  • Technical lead for Performance Verification
  • Developing methodologies for Timing and Power closure
  • Guide engineers in the team on various technical issues

Amd

Member of Technical Staff

Dec 2004Aug 2008 · 3 yrs 8 mos

  • Developed Parasitic Extraction flow using Cadence tools.
  • Involved in developing methodology for IR and EM analysis.
  • Noise Analysis and Electrical design rule checks.

Sun microsystem

MTS III

Aug 2002Dec 2004 · 2 yrs 4 mos

  • - Involved in development of buffer insertion and flop placement tools for interconnect optimization

Education

Indian School of Business

Master of Business Administration (MBA) — Finance and Marketing

Jan 2012Jan 2013

University of Cincinnati

MS — Computer Engineering

Jan 2000Jan 2002

National Institute of Technology Warangal

B.Tech — Electronics and Communication

Jan 1995Jan 1999

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