Dr. Ravi Payal — CEO
To be recognized as an efficient & competent individual having good interpersonal and technical skills. Being a hard worker with a positive attitude, I aspire to prove my talent in fast moving techno world. My broad level future goals are to work as project lead in VLSI design.Currently working at CDAC Noida as a Senior IT consultant. Main area in front End RTL Design . Having Expertise in Verilog RTL. .Pursuing MS in VLSI CAD from Manipal University. Specialties: Verilog, VHDL, Synthesis, FPGA Designing, Digital Designing,System Architecture Designing, ASIC
Stackforce AI infers this person is a VLSI and FPGA design expert with leadership experience in technology consulting.
Location: Noida, Uttar Pradesh, India
Experience: 22 yrs 5 mos
Skills
- Business Development
- Strategic Planning
- Vlsi
- Verilog
Career Highlights
- Expertise in Verilog and VLSI design.
- Proven leadership as Joint Director at CDAC.
- Strong background in FPGA and digital design.
Work Experience
CDAC,Noida
Joint Director (6 yrs 9 mos)
CDAC
Principal Technical Officer (4 yrs 11 mos)
Senior Technical Officer (4 yrs 9 mos)
Technical Officer (3 yrs 6 mos)
CDAC,Noida
IT consultant (6 yrs)
Education
Master of Science (MS) at Manipal University, India
BE at DIT Dehradun
at CDAC
Doctor of Philosophy - PhD at Guru Gobind Singh Indraprastha University (GGSIPU), Delhi