Juan Carlos Rey — CTO

Juan C. Rey rejoined Siemens EDA as Senior Vice President, Segment Leader/General Manager - Calibre Segment, after a brief retirement. He previously led all engineering research, development, and quality activities for Calibre in the Design to Silicon Division since 2001. Juan has served on the Board of Directors of Silicon Integration Initiative (SI2), on the Executive Technology Advisory Board of Semiconductor Research Corporation (SRC), and on industry advisory boards of academic research centers, such as the Center for Domain-Specific Computing at UCLA. Previously, Juan was Engineering Director for Physical Verification at Cadence Design Systems. Earlier positions include: management positions in Process Modeling and Parasitic Extraction at Technology Modeling Associates (TMA), where he joined prior to their IPO; Visiting Scholar at Stanford University; Senior Engineer at INVAP, Argentina; and Associate Professor at Universidad Nacional del Comahue, Argentina. Juan is also the author of numerous peer-reviewed publications and conference presentations.

Stackforce AI infers this person is a leader in EDA and semiconductor industries with extensive engineering management experience.

Location: Palo Alto, California, United States

Experience: 44 yrs 11 mos