May 2023 – Jul 2024 · 1 yr 2 mos · San Jose, California, United States · On-site

• Working on novel LD64 optimization to reduce size of mobile applications,
• Proposed and developed Differential Outlining: outlining similar instruction sequences.
• Developed novel technique to find similar instruction sequences as part of Differential Outlining

Aug 2020 – Mar 2023 · 2 yrs 7 mos · Mountain View, California, United States · On-site

• As part of team Adversarial program analysis (TAPA), which statically detects malware in android apps, SDKs, and frameworks, I designed and built a new android framework analysis pipeline to statically analyze OEM android frameworks. I also designed and prototyped heuristic reachability analysis to improve the precision of reachability analysis and help in improving the coverage of malware detection. Furthermore, building on heuristic-reachability analysis, I also proposed ML-based reachability analysis for an internship project that was approved by the team. I was also involved in detecting dynamic code loading within apps, detecting permission usage in SDKs. Prior to TAPA, I worked on distributed tracing within Google where I designed and implemented bucketed sampling of traces to collect traces of different RPCs in google services. I also had the opportunity to contribute to ML Guided Optimization (MLGO) for speed (O3) by developing a training pipeline for O3 optimization and experimenting for possible improvements over default O3 inlining.

Jan 2019 – Aug 2020 · 1 yr 7 mos · Atlanta, Georgia, United States · On-site

• For improving system security, I worked on a compiler-aided scheduler to detect and mitigate cache-based side-channel attacks. We leveraged the compiler to learn a linear regression model of cache-misses and predict the cache-misses of each loop in an application. The predicted cache-misses was then used by the scheduler to detect and mitigate cache-based side-channel attacks. I also worked on software-debloating for security, in which we inverted the conventional software debloating of cutting what is not needed approach to getting only what is needed approach resulting in much lower attack surface and enabling security against some kind of attacks previously not handled by control-flow integrity (CFI) mechanism. This work was published in PLDI 2020. I was also part of our work to determine the security challenges introduced by compiler optimizations which was published in OOPSLA 2021.
• For improving system performance, I worked on reducing unnecessary application migrations especially when processes are executing in a memory-reuse intensive region by determining such phases in applications through program analysis which resulted in up to 2x speedup gains. Further, to achieve very high throughput of batch jobs, I worked on developing a scheduler that processes compiler inserted beacon, which transmit applications’ dynamic information to the scheduler at runtime, which resulted in the throughput gain of as much as 4.7x on ThunderX and 5.2x on ThunderX2 machines. I also extended the scheduler for better co-location of applications for achieving low latency.
• I modeled non-determinism in parallel programs to determine compiler optimization levels for generating robust versions of the program and for easy reproduction of bugs published in ICPP 2020. I extended this model of non-determinism in parallel lock-based programs to Software Transactional Memory (STM) and used it to guide the STM to reduce variance in execution which was published in CGO 2019.

Aug 2016 – Dec 2018 · 2 yrs 4 mos · Atlanta, Georgia, United States · On-site

• I was the head teaching assistant for Compilers :Theory & Practice for Fall 2018, Spring 2017, Summer 2017, Fall 2017, Fall 2016. I designed a framework for the online course project to build a compiler for a C subset language. I guided students in implementing a complete compiler for a C subset language targeting MIPS ISA.

May 2016 – Jul 2016 · 2 mos · Palo Alto, California, United States · On-site

• As an intern in Cloud Platform Architecture, I implemented a wrapper library, Panda, for distributed services. Panda used curator and corfuDB as underlying libraries thus providing a single interface such that the underlying libraries can be switched without breaking dependencies.

May 2015 – Jul 2015 · 2 mos · Nashua, New Hampshire, United States · On-site

• As a Parallel Language Compiler Intern, I worked on proof of concept of proposed changes to C and C++ languages. Specifically I developed support for task parallelism in Clang/LLVM for C and C++.

Aug 2014 – Apr 2015 · 8 mos · Atlanta, Georgia, United States · On-site

• I was one of the teaching assistants for Embedded Software course. I got the opportunity to design one of the course projects in Vex.

Jun 2011 – Jul 2013 · 2 yrs 1 mo · Bengaluru, Karnataka, India · On-site

• I worked on developing drivers of different display protocols such as HDMI, DP.. I implemented new features such as smooth scaling in intel display driver. I worked on the proof of concept for new display protocol – USBAV protocol. I also got to Implement interrupt handling for the Intel Gen 6 processor (Skylake).

Jan 2011 – May 2011 · 4 mos · Bengaluru, Karnataka, India · On-site

• As a Graphics Software intern, I designed and developed a tool to validate display configuration of the Intel Gen 3 processor (Ivybridge) which enabled OEMs to design suitable display configs.

Jun 2010 – Aug 2010 · 2 mos · Bengaluru, Karnataka, India · On-site

• I designed and developed a statistics-collection module for multi-threaded applications in embedded systems.