Sekar A

Software Engineer

Bengaluru, Karnataka, India7 yrs 9 mos experience
Most Likely To SwitchHighly Stable

Key Highlights

  • 6 years of experience in ASIC PHY/SoC Verification
  • Expertise in PCIe protocol verification across multiple generations
  • Proficient in UVM and SystemVerilog for testbench development
Stackforce AI infers this person is a skilled ASIC Verification Engineer with expertise in PCIe protocols and UVM methodologies.

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Skills

Core Skills

Asic VerificationPcie Protocol

Other Skills

SystemVerilogUVMAXIAPBRTL DesignDebuggingPHYPerlApplication-Specific Integrated Circuits (ASIC)Digital ElectronicsI2C

About

6 years of experience in ASIC PHY/SoC Verification. * Currently working as ASIC Verification Engineer in PCIe protocol IP level verification. * Fair knowledge in SV, and UVM. Worked in UVM based Verification platform. * Developed the IP level testbench from scratch. * Used AXI and APB protocols in testbench architecture * Having good knowledge in PCI express protocol..Worked in PCIe/PCIe switch Gen1,Gen2, Gen3 and Gen4 verification

Experience

7 yrs 9 mos
Total Experience
3 yrs 10 mos
Average Tenure
5 yrs 5 mos
Current Experience

Mediatek

Senior Design Verification Engineer

Nov 2020Present · 5 yrs 5 mos · Bangalore Urban, Karnataka, India

ASIC VerificationPCIe ProtocolSystemVerilogUVMAXIAPB

Mbit wireless private limited

2 roles

Design Verification Engineer

Promoted

Jun 2018Oct 2020 · 2 yrs 4 mos

ASIC Verificatiom Engineer

Jan 2018May 2018 · 4 mos

Education

Pondicherry Engineering College

B.Tech — Electronics and Communications Engineering

Jan 2014Jan 2018

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