Nagesh N M — Product Engineer
A. Working @ intel Provides Better Foot-Step towards VLSI Industry B. Worked ON UPF , writing UPF for the Given Design , Low Power Methodology C. Scripting In Perl and TCL/TK. D. Tool Knowledge : VCS , VCLP and DC from SYNOPSYS , Cadance Virtuso , Xilinx , Questa Sim of Mentor Graphics , E. Hardware Languages: Verilog , VHDL , System Verilog
Stackforce AI infers this person is a VLSI Design Engineer with expertise in low power methodologies.
Location: Bengaluru, Karnataka, India
Experience: 7 yrs 3 mos
Skills
- Very-large-scale Integration (vlsi)
- Low Power Methodology
Career Highlights
- Expertise in VLSI and Low Power Methodology.
- Proficient in multiple hardware languages.
- Strong scripting skills in Perl and TCL/TK.
Work Experience
Intel Corporation
System-on-Chip Design Engineer (2 yrs)
Logic Design Methodology Engineer (4 yrs 6 mos)
Intern (1 yr)
Education
Masters at M S Ramaiah institute of Technology
Bachelor of Engineering at Adichunchanagiri Institute of Technology, CHIKKAMAGALUR
