K.AVINASH SUBUDHI

Software Engineer

Bengaluru, Karnataka, India5 yrs 10 mos experience
Highly Stable

Key Highlights

  • Expert in System Verilog and UVM methodologies.
  • Strong foundation in C++ and hardware verification.
  • Experience in both internship and full-time engineering roles.
Stackforce AI infers this person is a Hardware Verification Engineer with expertise in verification methodologies.

Contact

Skills

Core Skills

System VerilogUvm

Other Skills

C++VerilogC (Programming Language)PerlMicrosoft WordMicrosoft Office

Experience

5 yrs 10 mos
Total Experience
5 yrs 10 mos
Average Tenure
5 yrs 10 mos
Current Experience

Mediatek

3 roles

Staff Engineer

Jun 2023Present · 2 yrs 11 mos

C++System VerilogVerilogC (Programming Language)PerlUVM

Senior Verification Engineer

Jul 2020Jul 2023 · 3 yrs

Intern

Jul 2019Jul 2020 · 1 yr

Education

National Institute of Technology Rourkela

Master of Technology - MTech — Signal and Image Processing

Jan 2018Jan 2020

Veer Surendra Sai University Of Technology (VSSUT,Formerly UCE), Burla

Bachelor of Technology - BTech — Electronics and Telecommunications

Jan 2013Jan 2017

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