Shikha Sajeev — Software Engineer
A proactive and dedicated design verification engineer, Currently working on IP , SS and SOC level verification in Mediatek Bangalore. -Have good knowledge in System Verilog, UVM , AMBA protocols -PCIe controller IP verification and PCIe switch verification -waveform simulator experience with Verdi, DVE (VCS) -Excellent debugging and problem solving skills
Stackforce AI infers this person is a Design Verification Engineer specializing in semiconductor and IP verification.
Location: Bengaluru, Karnataka, India
Experience: 9 yrs 6 mos
Skills
- Functional Verification
- Universal Verification Methodology (uvm)
Career Highlights
- Expert in design verification methodologies.
- Proficient in System Verilog and UVM.
- Strong debugging and problem-solving skills.
Work Experience
MediaTek
Staff Engineer (3 yrs 10 mos)
Senior Engineer (2 yrs 10 mos)
Intern (11 mos)
Infosys
System Engineer (1 yr 11 mos)
Education
Master of Technology - MTech at Vellore Institute of Technology
Bachelor of Technology - BTech at Mahatma Gandhi University
