Tejeswarareddy Vaddireddy

Software Engineer

Bengaluru, Karnataka, India1 yr 3 mos experience

Key Highlights

Expertise in VLSI physical design and verification.
Proficient in multiple industry-standard tools.
Strong foundation in networking and electronic engineering.

Stackforce AI infers this person is a VLSI and Networking specialist with a focus on physical design and verification.

Contact

Skills

Core Skills

Physical DesignVlsiNetworking

Other Skills

Layout DesignStatic Timing AnalysisDesign Rule CheckingVLSI verification methodologySystem VerilogCisco NetworkingClockingUnified Power Format (UPF)Design FlowPDKElectronicsStandard CellSynopsys toolsAutomatic Test Pattern Generation (ATPG)System on a Chip (SoC)

About

Seeking for a secure a challenging postion in VLSI domain that gives ample scope to fulfill professional & personal goals and to work for the development of the organization to the highest possible limit. Tool knowledge: DC compiler l IC compiler ll l Fusion compiler l Prime Time l Tanner tool l Calibre l Tessent tool

Experience

1 yr 3 mos

Total Experience

1 yr 3 mos

Average Tenure

1 yr 3 mos

Current Experience

Mediatek

Physical design engineer

Jan 2025 – Present · 1 yr 3 mos · On-site

Physical designVLSILayout DesignStatic Timing AnalysisDesign Rule Checking

Maven silicon

2 roles

Lab mentor

Jan 2024 – Jan 2025 · 1 yr · Bengaluru, Karnataka, India

Physical Design Engineer

May 2023 – Jan 2024 · 8 mos · Bengaluru, Karnataka, India

Sri shasha prayathi technologies pvt. ltd.

Student Intern

Jun 2022 – Aug 2022 · 2 mos · Mangaluru, Karnataka, India

Vlsi signal processing..
I learn the concept of VLSI verification methodology and system verilog which will be highly required to start an industry standard protocol based project

VLSI verification methodologySystem VerilogVLSI