J Aarthi — Software Engineer
4+ years of experience in SoC and IP design for complex SoCs aimed at low power. Have experience in designing Boot Bringup IP, low power management IP FSMs, General Purpose IO controllers etc and Front End design flows.
Stackforce AI infers this person is a Semiconductor Design Engineer with a focus on Low-power SoC architecture.
Experience: 8 yrs 9 mos
Skills
- Soc Design
- Low-power Design
Career Highlights
- 4+ years in SoC and IP design for low power.
- Expertise in boot bringup and power management IP.
- Proven track record in RTL implementation and debugging.
Work Experience
NVIDIA
Senior ASIC Engineer (3 yrs 10 mos)
Samsung Semiconductor India
Staff Engineer (3 mos)
Associate Staff Engineer (2 yrs)
Senior Hardware Engineer (2 yrs)
Hardware Engineer (8 mos)
Education
Bachelor of Technology (B.Tech Honors) at National Institute of Technology, Tiruchirappalli
at Kendriya Vidyalaya