Hrushikesh Vaidya

Engineering Manager

Bengaluru, Karnataka, India24 yrs 11 mos experience

Most Likely To SwitchHighly Stable

Key Highlights

Proven leadership in multi-geographical team management.
Expertise in VLSI design and verification.
Strong background in PCIe IP design.

Stackforce AI infers this person is a VLSI and hardware design expert with strong leadership capabilities in engineering management.

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Skills

Core Skills

Design EngineeringVery-large-scale Integration (vlsi)

Other Skills

Multi geo team managementPCIe IP designVerification managementVLSI designPCI based technologiesGraphics HardwareHardware ArchitectureVerilogLow-power DesignApplication-Specific Integrated Circuits (ASIC)Universal Verification Methodology (UVM)

Experience

24 yrs 11 mos

Total Experience

6 yrs 6 mos

Average Tenure

10 yrs 9 mos

Current Experience

Intel corporation

3 roles

Sr engg manager

Promoted

Jan 2024 – Present · 2 yrs 3 mos

Multi geo team management.
PCIe IP design and verification manager.

Multi geo team managementPCIe IP designVerification managementDesign EngineeringVery-Large-Scale Integration (VLSI)

Verification Manager

Promoted

May 2019 – Dec 2023 · 4 yrs 7 mos

Graphics hardware engg

Jan 2015 – Dec 2018 · 3 yrs 11 mos · Bengaluru Area, India

Lsi, an avago technologies company

Sr design engg

Jan 2005 – Dec 2014 · 9 yrs 11 mos

Metta technology

Sr design engineer

Jan 2005 – Jan 2006 · 1 yr

Adaptec

Sr. Design engineer

Oct 2000 – Mar 2005 · 4 yrs 5 mos

After completing Bit Mappers course on VLSI design I joined Platys India communications which was later acquired by Adaptec.
Worked as Sr. Design engineer mainly on PCI based technologies.

VLSI designPCI based technologiesVery-Large-Scale Integration (VLSI)