Bala Shiva Vishwanatham

Product Engineer

Bengaluru, Karnataka, India4 yrs 11 mos experience
Most Likely To SwitchHighly Stable

Key Highlights

  • 4 years of experience in VLSI physical design.
  • Expertise in complete physical design flow.
  • Strong foundation in STA, DRC/LVS, and timing closure.
Stackforce AI infers this person is a VLSI Physical Design Engineer with expertise in semiconductor design.

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Skills

Core Skills

Physical DesignVery-large-scale Integration (vlsi)

Other Skills

Innovus tool experienceSystem on a Chip (SoC)

About

Physical Design Engineer with 4 years of hands-on experience in advanced technology nodes. worked at MediaTek, where I am responsible for the complete physical design flow from floorplanning to sign-off (Innovus tool experience). Previously worked at Intel ODC through Tech Mahindra and Cerium Systems, focusing on VLSI physical design. Strong foundation in STA, DRC/LVS, clock tree synthesis, power planning, and timing closure. I am passionate about continuous learning and committed to enhancing my technical and personal growth.

Experience

4 yrs 11 mos
Total Experience
2 yrs 5 mos
Average Tenure
3 yrs 5 mos
Current Experience

Mediatek

ASIC Physical Design Engineer

Nov 2022Present · 3 yrs 5 mos · Bengaluru, Karnataka, India · On-site

Innovus tool experiencePhysical Design

Intel corporation

ASIC Physical Design Engineer

May 2021Nov 2022 · 1 yr 6 mos · Bengaluru, Karnataka, India

  • worked as a Hardware Design Engineer
Very-Large-Scale Integration (VLSI)Physical Design

Chegg inc.

Chegg Tutor Freelancing

Feb 2018Mar 2021 · 3 yrs 1 mo · Hyderabad, Telangana, India

  • Worked as a freelancer for Chegg Inc, while preparing for career transition as VLSI physical design engineer.

Ace engineering academy

Education Training

Jan 2016Oct 2017 · 1 yr 9 mos · Hyderabad, Telangana, India

  • Prepared for GATE exam with the help of ACE engineering Academy Educational training Dilsuknagar Hyderabad.

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