Lakshmi Nair

Software Engineer

Delhi, India5 yrs 6 mos experience
Highly Stable

Key Highlights

  • Senior Lead Engineer with extensive experience in DV.
  • Proficient in Verilog and FPGA prototyping.
  • Strong background in Analog Circuit Design.
Stackforce AI infers this person is a Digital Verification Engineer with expertise in FPGA and circuit design.

Contact

LinkedIn

Skills

Core Skills

VerilogFpga Prototyping

Other Skills

VHDLCMatlabPSpiceCadence VirtuosoAnalog Circuit DesignMicrosoft WordMicrosoft PowerPointPerl

Experience

5 yrs 6 mos
Total Experience
5 yrs 6 mos
Average Tenure
5 yrs 6 mos
Current Experience

Qualcomm

5 roles

Senior Lead Engineer

Promoted

Dec 2025 – Present · 4 mos

VerilogVHDLCMatlabPSpiceCadence Virtuoso+2

Senior Engineer

Dec 2023 – Nov 2025 · 1 yr 11 mos

Engineer

Promoted

Dec 2021 – Nov 2023 · 1 yr 11 mos

Associate Engineer

Jul 2020 – Nov 2021 · 1 yr 4 mos

Interim Engineering Intern

May 2019 – Jul 2019 · 2 mos

  • worked as a part of the Design Verification team

3st technologies

Summer Training

Jun 2018 – Jul 2018 · 1 mo · Noida Area, India

  • covering digital design, Verilog HDL and FPGA prototyping
VerilogFPGA prototyping

Education

Delhi Technological University (Formerly DCE)

Bachelor of Technology - BTech — Electronics and Communication Engineering

Jan 2016 – Jan 2020

Bhatnagar International School - India

Class XII(All India Senior Secondary Certificate Examination-AISSCE 2016)

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