Satbeer Singh

Software Engineer

Kaithal, Haryana, India4 yrs 11 mos experience
Highly Stable

Key Highlights

  • Expert in Physical Design and ASIC development.
  • Strong background in Digital Image Processing.
  • Master's degree in VLSI Design from a reputed institute.
Stackforce AI infers this person is a Semiconductor Design Engineer with expertise in ASIC and VLSI technologies.

Contact

LinkedIn

Skills

Core Skills

Physical DesignApplication-specific Integrated Circuits (asic)Digital Image Processing

Other Skills

PNRTimingPhysical VerificationVerilogRTL DesignLogic SynthesisElectronicsVery-Large-Scale Integration (VLSI)Field-Programmable Gate Arrays (FPGA)C (Programming Language)TCLRTL CodingFloorplanningDesign Rule Checking (DRC)Layout Versus Schematic (LVS)

About

Experienced Physical Design professional with a demonstrated history of working in the semiconductor industry. Skilled in Application-Specific Integrated Circuits (ASIC), PNR, Timing, and in Physical Verification. Strong engineering professional with a Master of Technology - MTech focused in VLSI Design from Thapar Institute of Engineering & Technology.

Experience

4 yrs 11 mos
Total Experience
4 yrs 11 mos
Average Tenure
4 yrs 11 mos
Current Experience

Intel corporation

2 roles

Physical Design Engineer

Jun 2021 – Present · 4 yrs 11 mos

Physical DesignApplication-Specific Integrated Circuits (ASIC)PNRTimingPhysical Verification

Intern

Aug 2020 – Jun 2021 · 10 mos

Semi conductor laboratory

Intern

Jan 2019 – Jun 2019 · 5 mos · Mohali,Punjab

  • worked on Digital Image processing.written the verilog code for Digital Zoom and JPEG image compression
Digital Image ProcessingVerilog

Education

Thapar Institute of Engineering & Technology

Master of Technology - MTech — VLSI Design

Jan 2019 – Jan 2021

Kurukshetra University

M.Sc — Electrical and Electronics Engineering

Jan 2017 – Jan 2019

Kurukshetra University

B.Sc

Jan 2014 – Jan 2017

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