CHAVA VAMSI

DevOps Engineer

Bengaluru, Karnataka, India12 yrs 5 mos experience

Highly Stable

Key Highlights

Expert in memory-based protocols like LPDDR and DDR.
Proficient in Functional Verification and SystemVerilog.
Strong background in ASIC and VLSI design.

Stackforce AI infers this person is a Semiconductor Verification Engineer with expertise in memory protocols and functional verification.

Contact

Skills

Core Skills

Functional VerificationSystemverilog

Other Skills

VerilogCVLSIModelSimASICStatic Timing AnalysisFPGAEDAUARTXilinxIntegrated Circuit DesignUVMRTL designRTL codingDDR

About

Working as a IP Verification Engineer in memory based protocols like ..LPDDR(2/3) and DDR(2/3/4).

Experience

12 yrs 5 mos

Total Experience

3 yrs 11 mos

Average Tenure

8 mos

Current Experience

Intel corporation

SOC DV ENGINEER

Aug 2025 – Present · 8 mos · Bengaluru, Karnataka, India · On-site

VerilogCVLSIModelSimSystemVerilogASIC+15

Qualcomm

3 roles

Staff Engineer

Jan 2024 – Mar 2025 · 1 yr 2 mos · Bengaluru, Karnataka, India · On-site

Senior DV Lead Engineer

Promoted

Jan 2021 – Dec 2023 · 2 yrs 11 mos · Bengaluru, Karnataka, India · On-site

Senior Verification Engineer

Sep 2016 – Dec 2020 · 4 yrs 3 mos · Bengaluru, Karnataka, India · On-site

Mindlance technologies

Senior Verification Engineer

Jul 2016 – Aug 2016 · 1 mo · Bengaluru, Karnataka, India · On-site

Mobiveil inc.

Verfication Engineer

May 2013 – Jun 2016 · 3 yrs 1 mo · Chennai, Tamil Nadu, India · On-site

Maven silicon

Internship

Dec 2012 – Apr 2013 · 4 mos · Bangalore Urban, Karnataka, India

Education

Jawaharlal Nehru Technological University

Bachelor of Technology (B.Tech.) — E.C.E

Jan 2006 – Jan 2010

SPECTRA JUNIOR COLLEGE

BOARD OF INTERMIDATE

Jan 2004 – Jan 2006

CENTURY HIGH SCHOOL

S.S.C — 10th CLASS

Jan 2004 – Present

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