S

Sirimilla Bharathi

Software Engineer

Andhra Pradesh, India5 yrs 6 mos experience
Highly Stable

Key Highlights

  • Experienced in VLSI and Embedded Systems design.
  • Proficient in formal verification methodologies.
  • Strong leadership skills in team management.
Stackforce AI infers this person is a VLSI and Embedded Systems engineer with formal verification expertise.

Contact

LinkedIn

Skills

Other Skills

Embedded SystemsVery-Large-Scale Integration (VLSI)Microsoft OfficeMicrosoft ExcelLeadershipVHDLVerilogCadence VirtuosomultisimXilinx VivadoC (Programming Language)MicroprocessorsVLSI CADDigital IC DesignDigital Communication

Experience

5 yrs 6 mos
Total Experience
4 yrs 5 mos
Average Tenure
1 yr 1 mo
Current Experience

Amd

Senior Silicon Design Engineer

Mar 2025 – Present · 1 yr 1 mo · Bengaluru, Karnataka, India

Intel corporation

2 roles

Formal Verification Engineer

Jun 2021 – Mar 2025 · 3 yrs 9 mos · Bangalore Urban, Karnataka, India

Intern

Aug 2020 – Apr 2021 · 8 mos · Bengaluru, Karnataka, India

  • Formal verification

Education

Maulana Azad National Institute of Technology

M.Tech — VLSI and Embedded Systems

Jan 2019 – Jan 2021

JNTUA College of Engineering, Pulivendula

Bachelor of Technology - BTech — Electrical and Electronics Engineering

Jan 2015 – Jan 2019

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