Venkatesh V

Software Engineer

Bengaluru, Karnataka, India13 yrs 10 mos experience
Highly Stable

Key Highlights

  • Experienced ASIC Design Engineer at Meta
  • Strong background in VLSI and Integrated Circuit Design
  • Proficient in multiple hardware description languages
Stackforce AI infers this person is a VLSI ASIC Design Engineer with expertise in Integrated Circuit Design.

Contact

LinkedIn

Skills

Core Skills

AsicVlsi

Other Skills

VerilogSystemVerilogIntegrated Circuit DesignFPGAC++XilinxMicrocontrollersMicrosoft OfficeLinuxMatlabRTL codingVHDLMicrosoft ExcelMmicroprocessorsField-Programmable Gate Arrays (FPGA)

Experience

13 yrs 10 mos
Total Experience
11 yrs 3 mos
Average Tenure
2 yrs 7 mos
Current Experience

Meta

ASIC Design Engineer

Oct 2023 – Present · 2 yrs 7 mos · Bengaluru, Karnataka, India · On-site

ASICVLSIVerilogSystemVerilogIntegrated Circuit DesignFPGA

Broadcom

2 roles

IC Design Engineer

Jun 2013 – Oct 2023 · 10 yrs 4 mos · Bangalore

Intern

Jul 2012 – Jun 2013 · 11 mos · Bangalore

Education

Manipal Institute of Technology

M Tech — Digital Electronics & Advanced Communications

Jan 2011 – Jan 2013

Atria Institute of Technology

B.E — Electronics and Communications

Jan 2006 – Jan 2010

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