Rayagiri Hemanth Kumar — Product Engineer
RTL Design Intern at MediaTek | Master’s student in Microelectronics at BITS Pilani Hyderabad Campus. Interested in Digital Design, VLSI Architecture, Digital IC Design, and Verilog coding, with a strong focus on building a career in the semiconductor industry.
Stackforce AI infers this person is a VLSI Design Engineer with a focus on Digital IC Design and Semiconductor technologies.
Location: Bengaluru, Karnataka, India
Experience: 3 mos
Skills
- Digital Ic Design
- Verilog
- Cadence Virtuoso
Career Highlights
- Strong foundation in Digital IC Design and VLSI Architecture.
- Hands-on experience with industry-standard tools like Cadence and Xilinx.
- Pursuing advanced studies in Microelectronics at a prestigious institution.
Work Experience
MediaTek
RTL Design Intern (3 mos)
BITS Pilani, Hyderabad Campus
Teaching Assistant (1 yr 4 mos)
Education
Master of Engineering - MEng at BITS Pilani, Hyderabad Campus
Bachelor of Technology - BTech at Sreenidhi Institute of Science and Technology
Intermediate at Sri Chaitanya Junior College Madhapur
8th - 10th at Sri Chaitanya Techno School Kompally
1st - 7th at St Mary's Vidyaniketan High School
