Sarvesh Singh

Software Engineer

Bengaluru, Karnataka, India8 yrs 8 mos experience
Most Likely To SwitchHighly Stable

Key Highlights

  • Over 3 years in hardware design and verification.
  • Expertise in System Verilog and UVM.
  • Successful Kaggle projects in Machine Learning.
Stackforce AI infers this person is a Hardware Design Engineer with a focus on ASIC and verification technologies.

Contact

Skills

Core Skills

Digital LogicIc Design Verification

Other Skills

ScriptingpythonArtificial Neural NetworkscnnMachine Learningsystem verilogSignal IntegrityCC++matlabMicrosoft Excel

About

More than 3 years of work experience in hardware design and verification. I have completed verification of a block from start to end. During my journey i have worked on several languages like system verilog/UVM, python, perl, c++ etc. I have also worked on and interested in Machine learning/AI and have submitted some Kaggle projects successfully.

Experience

8 yrs 8 mos
Total Experience
2 yrs 10 mos
Average Tenure
4 yrs 8 mos
Current Experience

Amd

Sr Silicon Design Engineer

Sep 2021Present · 4 yrs 8 mos · India

Digital LogicScriptingIC design verification

Juniper networks

ASIC Engineer-2

Mar 2018Aug 2021 · 3 yrs 5 mos

Digital LogicScriptingIC design verification

Infosys limited

Hardware Engineer

Aug 2017Mar 2018 · 7 mos · Bangalore

  • Working as hardware design and verification enginner
Digital LogicScriptingIC design verification

Education

Indian Institute of Science (IISc)

Master’s Degree — Microelectronics

Jan 2015Jan 2017

National Institute of Technology Surat

Engineer's Degree — electrical engineering

Jan 2009Jan 2013

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