Shirin Dewan

Software Engineer

Bengaluru, Karnataka, India6 yrs 10 mos experience
Highly Stable

Key Highlights

  • Expertise in ASIC and low power design.
  • Proficient in Cadence Virtuoso and Innovus tools.
  • Strong background in VLSI physical design.
Stackforce AI infers this person is a VLSI design engineer with expertise in ASIC and low power design.

Contact

Skills

Other Skills

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About

MediaTek's physical design landscape has been transformed by our team's acumen in ASIC and low power design, grounded in a solid Master of Technology education from VIT University. Our command over tools like Cadence Virtuoso and Innovus propels us to deliver high-efficiency layouts and optimize design processes, reflecting a strong repertoire in VLSI physical design. Embracing the complexity of technological evolution, we're committed to pioneering advancements and achieving excellence in our field. Outside of professional pursuits, engaging in badminton and mountaineering equips me with the resilience and dynamism necessary to scale new heights in VLSI innovation.

Experience

6 yrs 10 mos
Total Experience
6 yrs 10 mos
Average Tenure
6 yrs 10 mos
Current Experience

Mediatek

3 roles

Staff Engineer

Promoted

Jun 2025Present · 11 mos

Senior Engineer

Promoted

Jul 2020Jun 2025 · 4 yrs 11 mos

Physical Design Engineer

Jul 2019Jul 2020 · 1 yr

Education

VIT University (Chennai Campus)

Master of Technology - MTech — VLSI DESIGN

Jan 2018Jan 2020

Jaypee University of Information Technology

undergraduate

Jan 2013Jan 2017

DAV school ,New Shimla

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