John Shahid

Software Engineer

Andhra Pradesh, India3 yrs 8 mos experience

Key Highlights

Experienced in Design Verification for VLSI and ASIC projects.
Proficient in Universal Verification Methodology and SystemVerilog.
Strong background in Digital Electronics and Hardware verification.

Stackforce AI infers this person is a VLSI Design Verification Engineer with expertise in ASIC and SoC development.

Contact

Skills

Core Skills

Digital ElectronicsLinuxUniversal Verification Methodology (uvm)

Other Skills

HardwareSystemVerilogAssertionsObject-Oriented Programming (OOP)Digital LogicDesign SpecificationsIP VerificationSystem on a Chip (SoC)DVFunctional VerificationDebuggingAPBAXIProgrammingIntegrated Circuits (IC)

About

Design Verification Engineer at Mirafra Technologies

Experience

3 yrs 8 mos

Total Experience

11 mos

Average Tenure

8 mos

Current Experience

Mediatek

3 roles

Senior Engineer

Aug 2025 – Present · 8 mos

Senior Engineer

Aug 2025 – Present · 8 mos

Senior Engineer

Aug 2025 – Present · 8 mos

Analog devices

Design Verification Engineer

Aug 2024 – Dec 2025 · 1 yr 4 mos · Bengaluru, Karnataka, India · On-site

Mirafra technologies

2 roles

Design Verification Engineer-1

Feb 2023 – Aug 2024 · 1 yr 6 mos · Bengaluru, Karnataka, India

Digital ElectronicsLinux

Design Verification Engineer Trainee

Aug 2022 – Feb 2023 · 6 mos · Bengaluru, Karnataka, India

HardwareUniversal Verification Methodology (UVM)

Samsung semiconductor

Design Verification Engineer (Contract)

Feb 2023 – Jun 2023 · 4 mos · Bengaluru, Karnataka, India · On-site

Universal Verification Methodology (UVM)SystemVerilog

Bosch global software technologies

VLSI Engineer

Oct 2021 – May 2022 · 7 mos · Bengaluru, Karnataka, India

Education

Vellore Institute of Technology

Mtech — VLSI Design

Jan 2020 – Jan 2022

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