abhijit madhava rao

Software Engineer

Bengaluru, Karnataka, India10 yrs 10 mos experience

Most Likely To SwitchHighly Stable

Key Highlights

Expert in VLSI and SoC design.
Strong background in digital and analog circuit design.
Proficient in multiple programming languages and tools.

Stackforce AI infers this person is a VLSI and SoC design expert in the semiconductor industry.

Contact

Skills

Core Skills

Very-large-scale Integration (vlsi)System On A Chip (soc)

Other Skills

SystemVerilogPerlVerilogLinuxDigital DesignsCMatlabLabVIEWVHDLAnalog CircuitsJenkinsElectronicsMicrosoft OfficeMicrosoft WordPowerPoint

Experience

10 yrs 10 mos

Total Experience

5 yrs 5 mos

Average Tenure

9 yrs 8 mos

Current Experience

Qualcomm

3 roles

Staff Engineer

Promoted

Dec 2024 – Present · 1 yr 5 mos

SystemVerilogPerlVerilogLinuxDigital DesignsC+8

Senior Engineer

Nov 2018 – Dec 2024 · 6 yrs 1 mo

SystemVerilogPerlVerilogLinuxDigital DesignsC+8

SoC Verification Engineer

Sep 2016 – Dec 2024 · 8 yrs 3 mos

SystemVerilogPerlVerilogLinuxDigital DesignsC+8

Intel corporation

Intern

Jun 2015 – Aug 2016 · 1 yr 2 mos

Education

School of Information Sciences Manipal Academy of Higher Education (MAHE)

MScTech — VLSI Design

Jan 2014 – Jan 2016

K S Institute of Technology

BE — Electronics and Communication

Jan 2010 – Jan 2014

Vijaya Composite PU College

Physics

Jan 2008 – Jan 2010

Vijaya High School

SSLC

Jan 2005 – Jan 2008

Stackforce found 100+ more professionals with Very-large-scale Integration (vlsi) & System On A Chip (soc)

Explore similar profiles based on matching skills and experience

Karthikeyan J G

Senior Department Manager

at MediaTek

Bengaluru, India17 yrs exp

Sanika Turkewadikar

Senior Staff Engineer

at SAMSUNG R&D INDIA - BANGALORE PRIVATE LIMITED

Bengaluru, India16 yrs 11 mos exp

Application-Specific Integrated Circuits (ASIC)Analog

Ankush Nehra

ASIC Design Engineer

at Meta

Bengaluru, India7 yrs 10 mos exp

RTL DesignSoC Integration

Pritender Singh

Principal Design Engineer

at TSMC

Kanata, Canada17 yrs 5 mos exp

ASICEmbedded SystemsVLSI

RANJAN P

Sr Manager-DFT

at Product Company

Bengaluru, India21 yrs exp

DFTVLSI

Akhil Yakkala

Senior silicon Design Engineer

at AMD

West Godavari, India4 yrs 1 mo exp

Field-Programmable Gate Arrays (FPGA)Verilog

Aanchal Mittal

Technical Lead

at AMD India Pvt. Ltd.

Hyderabad, India14 yrs 9 mos exp

Functional VerificationSoC Design

Nakul C Kubsad

Senior Physical Design Engineer

at MediaTek

Bengaluru, India3 yrs 10 mos exp

Physical DesignPlace & Route