Vinay Hiremath — Software Engineer

ASIC SOC Verification, IP Verification, ARM Based Subsystem Verification using C & Assembly, UVM FPGA Design/Verification. ASIC to FPGA Prototyping. Assertion based Verification DDR/Nand Flash PHY Verification using UVM, SOC Bus Fabric Verification using UVM/VMM Exposure to Board Design, Gate Level Simulations, Power Aware Simulations - UPF PERL/Python Scripting, Exposure ARM GIC500/600 Exposure ARM CCI 550 ARM Cortex A/M/R Series Cores Specialties: Involved in development cycle of the telecom products like E1/E3 Multiplexers,SONET /SDH Multiplexers.(STM-0/STM-1). Also worked with ARM based SOC for Set top box equipment, Digital baseband chips for Mobile phones, LTE/UMTS transceivers, SUN Thin Client systems etc.

Stackforce AI infers this person is a highly skilled ASIC and FPGA verification engineer in the semiconductor industry.

Location: Bengaluru, Karnataka, India

Experience: 21 yrs 6 mos