Sitaram Banda

Software Engineer

Bengaluru, Karnataka, India23 yrs 5 mos experience

Highly Stable

Key Highlights

Expert in ASIC design and implementation.
Strong background in VLSI and FPGA technologies.
Proven leadership in technical engineering roles.

Stackforce AI infers this person is a VLSI and ASIC design expert with extensive experience in hardware engineering.

Contact

Skills

Core Skills

AsicVlsi

Other Skills

DFTSoC ImplementationFPGANetworkingStorage Sub-system IP developmentASIC ImplementationTiming ClosureSpecificationRTL developmentVerificationFPGA prototypingtape-out sign-offSpyglass

About

Experience at all phases of the ASIC Flow: RTL Coding, Verification, FPGA proto-typing, ASIC Synthesis, DFT, Timing closure, Scan pattern bring-up at ATE and post silicon validation support.

Experience

23 yrs 5 mos

Total Experience

4 yrs

Average Tenure

3 yrs

Current Experience

Renesas electronics

Sr Principal Engineer

May 2023 – Present · 3 yrs · Bengaluru, Karnataka, India · Hybrid

ASICDFTVLSI

Sandisk, a western digital brand

Sr Technologist

Apr 2016 – Apr 2023 · 7 yrs

Mediatek

Principal Engineer

Jul 2015 – Mar 2016 · 8 mos · Bengaluru Area, India

SoC Implementation

SoC Implementation

Ineda systems

2 roles

Principal Member of Technical Staff

Promoted

Jan 2013 – Jun 2015 · 2 yrs 5 mos

FPGA, Networking, Storage Sub-system IP development

FPGANetworkingStorage Sub-system IP development

Senior Member of Technical Staff

Jan 2011 – Dec 2012 · 1 yr 11 mos

FPGA

FPGA

Amd

Sr Staff Engineer - ASIC Design

Oct 2004 – Dec 2010 · 6 yrs 2 mos

ASIC Implementation / Timing Closure.

ASIC ImplementationTiming ClosureASIC

Cute solutions india pvt ltd

Member Technical, Staff

Oct 2001 – Jan 2004 · 2 yrs 3 mos

Responsible for Specification, RTL development, Verification, FPGA prototyping, ASIC Implementation & tape-out sign-off of DSP subsytem targetting for Audio, VoIP applications.

SpecificationRTL developmentVerificationFPGA prototypingASIC Implementationtape-out sign-off+1