Gourav Kapoor

Software Engineer

India14 yrs 9 mos experience

Highly Stable

Key Highlights

Expert in Static Timing Analysis and Timing Closure.
Proficient in multiple scripting languages for automation.
Experience with advanced semiconductor technologies.

Stackforce AI infers this person is a Semiconductor Design Engineer with expertise in timing analysis and closure.

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Skills

Core Skills

Static Timing AnalysisTiming Closure

Other Skills

TclPerlShell ScriptingDebuggingLogic SynthesisVerilogC++TestingSemiconductorsRTL codingRTL DesignApplication-Specific Integrated Circuits (ASIC)CSoCSystem on a Chip (SoC)

About

Working on timing constraints generation and static timing analysis

Experience

14 yrs 9 mos

Total Experience

6 yrs 8 mos

Average Tenure

1 yr 4 mos

Current Experience

Nxp semiconductors

Physical Design Engineer

Dec 2024 – Present · 1 yr 4 mos

Intel corporation

2 roles

STA Design Engineer

Apr 2022 – Dec 2024 · 2 yrs 8 mos

STA Design Engineer

May 2020 – Apr 2022 · 1 yr 11 mos

Freescale semiconductor

2 roles

Senior Design Engineer

Feb 2014 – May 2020 · 6 yrs 3 mos

Design Engineer

Jun 2011 – Jan 2014 · 2 yrs 7 mos

Currently working as an STA Engineer in the Automotive and Industrial Solutions Group at Freescale Semiconductor, Noida, India.
Tool Used: Encounter Timing System (ETS), Debussy.
Worked on 45 nm and 65nm technology nodes, responsible for the functional, merged-mode and test modes (At-Speed, Stuck-At, Shift, MBIST and LBIST) constraints development and timing closure of chip as well as multiple blocks of a hierarchical design in synergy with the PnR and Synthesis Teams.
Scripting Languages: Tcl, Perl and Shell Scripting.
Various degrees of automation from simple file parsing, to extracting information from the design and timing libraries.
Involved in timing closure of IO Interfaces like: SPI, DSPI, JTAG etc.
Basic Hands-On on RTL Compiler.

TclPerlShell ScriptingStatic Timing AnalysisTiming ClosureDebugging+2