Vasanthi Kanchi — Software Engineer
- Experienced in deep sub-micron designs (3nm). - hands-on experiencein both synopsys and cadence tools - Handled critical blocks in lower node technologies from PNR to GDSII which are timing and congestion critical and responsible for successful completion of tapeout for several blocks. - Had good exposure to physical Design Tasks with knowledge in Floor planning, placement, clock-tree synthesis CTS, routing concepts. - Basic Knowledge on DRC/LVS and other physical checks and resolved several issues. - Experience in dealing with critical blocks in ECO’s. - Worked on Low power designs.(Design for Power DFP).
Stackforce AI infers this person is a Semiconductor Design Engineer with expertise in Physical Design and Low-power methodologies.
Location: Bengaluru, Karnataka, India
Experience: 7 yrs 4 mos
Skills
- Physical Design
- Low-power Design
Career Highlights
- Expert in deep sub-micron designs at 3nm.
- Hands-on experience with Synopsys and Cadence tools.
- Proven track record in successful tapeout completion.
Work Experience
MediaTek
Physical Design Engineer (4 yrs)
Soctronics
Physical Design Engineer (3 yrs 4 mos)
VEDA IIT
Physical Design Engineer (7 mos)
Education
Bachelor of Technology - BTech at JNTUK,University college of Engineering,Vizianagaram
Intermediate at NRI Academy, Guntur
at The Central Public School, Guntur
