ramakrishnan varadhan

Director of Engineering

Bengaluru, Karnataka, India25 yrs 6 mos experience
Highly Stable

Key Highlights

  • 20 years of experience in semiconductor industry.
  • Expertise in SoC implementation and physical design.
  • Led multiple successful ASIC tapeouts.
Stackforce AI infers this person is a semiconductor design expert with extensive experience in SoC and ASIC implementations.

Contact

Skills

Core Skills

AsicVlsi

Other Skills

Place and RouteICSoCVerilogDebuggingEDAEmbedded SystemsStatic Timing AnalysisRTL DesignFunctional VerificationPhysical DesignIntegrated Circuit DesignFloorplanningLow-power DesignTCL

About

I proudly stepped into 2-decades of experience in the semiconductor industry, with a primary focus on all facets of SoC Implementation. Plenty of Career Tapeouts with high experience in physical design implementation of SOC/GPU/CPU/MM/CAM/MODEM designs. I groomed my skillset by Industry top leaders like QUALCOMM and MEDIATEK SINGAPORE. Expertise in the physical design of the end-to-end tool, flow, and methodologies for faster convergence and best-in-class Power-Performance-Area-Schedule. Rich experience in people, engagement, program and stakeholder management

Experience

25 yrs 6 mos
Total Experience
7 yrs 3 mos
Average Tenure
4 yrs
Current Experience

Cadence design systems

Director

May 2022Present · 4 yrs · Bengaluru, Karnataka, India

Mediatek

2 roles

Techical manager

Promoted

Sep 2015Sep 2022 · 7 yrs · Singapore

Member of Technical Staff

Jun 2014Aug 2015 · 1 yr 2 mos · Singapore

Qualcomm

3 roles

Staff Engineer

Oct 2012May 2014 · 1 yr 7 mos

Senior Engineer, Lead

Promoted

Apr 2007Oct 2012 · 5 yrs 6 mos

  • Doing Place and Route in ASIC/VLSI IC designs.

Senior Engineer

Nov 2003Apr 2007 · 3 yrs 5 mos

Synopsys india

Engineer

Aug 2000Oct 2003 · 3 yrs 2 mos

Education

Madras University

BE — Electrical and Electronics

Jan 1996Jan 2000

Avichi Hr sec school , chennai

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ramakrishnan varadhan | Stackforce