J

Jai Verma

Software Engineer

Santa Clara, California, United States18 yrs 1 mo experience
Highly Stable

Key Highlights

  • Expert in MBE growth and nanotechnology.
  • Led deep-UV LED project with significant advancements.
  • Strong background in semiconductor fabrication techniques.
Stackforce AI infers this person is a specialist in semiconductor fabrication and nanotechnology with a focus on advanced materials.

Contact

Skills

Core Skills

NanotechnologyMaterials Science

Other Skills

MBE growthOxide growthDeep-UV LED projectGraded-AlGaN growthTraining and advisingFabricationTEM characterizationPhotolithographyCharacterizationScanning Electron MicroscopyThin FilmsNanofabricationPhysicsAFMElectron Beam Lithography

Experience

18 yrs 1 mo
Total Experience
5 yrs 7 mos
Average Tenure
1 yr 3 mos
Current Experience

Nvidia

Sr ASIC Engineer

Jan 2025Present · 1 yr 3 mos

Intel corporation

3 roles

SoC Debug Engineer

Apr 2021Dec 2024 · 3 yrs 8 mos

System Validation Engineer

Jun 2018Mar 2021 · 2 yrs 9 mos

  • Creating, defining and developing system validation environment and test suites. Using and applying emulation and platform-level tools and techniques to ensure performance to specification. Work on development of methodologies, execution of validation plans, and debug of failures through broad understanding of multiple system areas. Continuous interfacing with Architecture, Design, and Pre-silicon Validation teams in improving post-silicon test content and providing feedback for future on-die debug features.

Ptd Mod & Integr Yield Eng

Aug 2014May 2018 · 3 yrs 9 mos

  • Process development of Intel's leading edge 10nm microprocessor through yield analysis. Detailed knowledge of Intel's 14nm, 10 nm CMOS microprocessor fabrication process flow. Experience across multiple test vehicles including SRAM memory, Device/ E-test, scan chains, product, inline metrology & defect data.
  • Define roadmaps and perform statistical data analysis of impact for multiple process changes. Define process windows that ensure high electrical yield, build models of yield limiters & predicting the outcome of the process improvements on the overall health of the process technology. Lead cross-functional teams involving Process Integration, Fault Isolation (FI)/Failure Analysis (FA), Design and Yield.
  • Root cause debug of device failure through parametric analysis of SRAM memory circuits including transistor I-V curves (LYA test mode), Electrical/Optical fault Isolation (FI) using Infrared Emission Microscopy (IREM), Laser Voltage Probing (LVP) technology of 14nm, 10nm Si CMOS process & its derived products.

University of notre dame

2 roles

Research Assistant Professor

Promoted

Aug 2013Aug 2014 · 1 yr

  • Key accomplishments:
  • 1. Developed Growth technique of graded-AlGaN for GaN power diodes.
  • 2. Co-advised a graduate student.
  • 3. Installed Veeco Gen 930 system for oxide growth
  • 4. Recipient of Notre Dame's Faculty Research Initiation Grant for the year 2014.
  • Key responsibilities:
  • 1. deep-UV LED project lead.
  • 2. In-charge of MBE lab with two Veeco Gen 930 MBEs
  • 3. Train and advise growers on oxide and III-Nitrides growth.
MBE growthOxide growthDeep-UV LED projectGraded-AlGaN growthTraining and advisingNanotechnology+1

Graduate Student

Aug 2008Aug 2013 · 5 yrs

  • Joined University of Notre Dame as Research Assistant in Fall of 2008.
  • Key accomplishments:
  • 1. Gained expertise on nano-fabrication tools (lithography, etching, deposition, furnace)
  • 2. Fabricated and characterized of p-n diode, NMOS and Ring Oscillator on Si wafer.
  • 3. Worked on MBE growth of III-Nitrides as part of research work.
  • 4. Mastered characterization techniques as TEM, SEM, XRD, AFM.
  • 5. Demonstrated first GaN QW UV LED on N-face GaN substrate
  • 6. Developed growth technique for ultra-thin (1-2 MLs thick) GaN layers to form QWs and QDS for
  • deep-UV emission.
  • 7. Demonstrated first deep-UV emission from ultra-small GaN QDs on AlN template with ~221 nm
  • lowest wavelength of emission
  • 8. Demonstrated first tunnel injection polarization doped GaN QD UV LED with emission
  • wavelengths tuneable to ~240 nm
  • Key Responsibilities:
  • 1. In-charge III-Nitrides MBE lab from 2011-2014. Responsible for upkeep and maintenance of
  • Veeco Gen 930 MBE system.
  • 2. Training of new graduate students on MBE growth.
  • 3. Vice-president of Electron microscopy club at Notre Dame from 2013-2014.

Indian institute of technology, kanpur

Teaching Assistant

Aug 2007Apr 2008 · 8 mos

Education

University of Notre Dame

M.S; PhD — Electrical Engineering

Jan 2008Jan 2013

Indian Institute of Technology, Kanpur

B-Tech/M-Tech — Electrical Engineering

Jan 2003Jan 2008

IIT KANPUR

M.Tech — Electrical Engineering

Jan 2003Jan 2008

IIT KANPUR

B.Tech — Electrical Engineering

Jan 2003Jan 2008

Stackforce found 100+ more professionals with Nanotechnology & Materials Science

Explore similar profiles based on matching skills and experience