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Abhesh Tripathi

Product Engineer

Bengaluru, Karnataka, India19 yrs 5 mos experience
Most Likely To SwitchHighly Stable

Key Highlights

  • 17+ years in VLSI memory circuit design.
  • Expert in product development and market analysis.
  • Strong leadership and communication skills.
Stackforce AI infers this person is a VLSI Memory Solutions Architect with expertise in product development and customer engagement.

Contact

Skills

Other Skills

Memory Circuit DesignEDAVLSIASICStatic Timing AnalysisPhysical DesignSoC

About

Summary - Currently working as Memory Solutions Architect at Intel. - Management Graduate from Indian Institute of Management, Bangalore in Marketing and Strategy - 17+ years of working experience in VLSI memory circuit design & EDA tool development - Expertise in different stages of product development – investigation, implementation, verification and delivery - Expertise in market analysis and product life cycle management - Expertise in pre-sales in high tech industry Competencies - Product development, planning, implementation and delivery - Handling customer queries as part of pre-sales - Interface with cross functional/global team - Market study and understanding customer perspective Soft Skills - Excellent written and verbal communication - Exemplary team player and leadership abilities - Hard working, highly self-motivated, capacity to coordinate and take initiative Technical Skills - Memory circuit design and compiler development - MS Power Point, MS Excel

Experience

19 yrs 5 mos
Total Experience
6 yrs 5 mos
Average Tenure
9 yrs
Current Experience

Intel corporation

2 roles

Memory Solutions Architect at Intel

Promoted

Apr 2017Present · 9 yrs

Application and Solutions Engineer Memory and SC IPs

Apr 2017Apr 2024 · 7 yrs

  • I provide end to end customer enablement and support for Memory and Standard Cell IPs. Responsibilities involve support on post design win phases including product definition, product development, integration, tape in and post Si analysis. Also responsible for vendor engagement and enablement for design closure, project schedule, performance metrics and quality.

Arm

2 roles

Staff Design Engineer

Dec 2016Apr 2017 · 4 mos · Bangalore

  • Memory Circuit Design and Compiler Development

Senior Design Engineer

Jan 2012Dec 2016 · 4 yrs 11 mos · Bangalore

  • Memory Circuit Design, Characterization and Compiler Development

Interra systems

3 roles

Principal Engineer

Promoted

Jan 2011Dec 2011 · 11 mos

  • Jan 2011 to present : Principal Engineer(VLSI Memory Circuit Design) : Bangalore, Client Site (ARM Embedded Technologies)

Senior Design Engineer

Promoted

Aug 2008Dec 2010 · 2 yrs 4 mos

  • Worked as Senior Circuit Design Engineer(Memories) at Client Site: ARM Embedded Technologies Bangalore

Member of Technical Staff

Aug 2006Jul 2008 · 1 yr 11 mos

  • As
  • 1. Memory Circuit Design Engineer: Aug 2006 to Feb 2008: Noida
  • 2. Memory Circuit Design Engineer: Feb 2008 to July 2008: Bangalore, Client Site(ARM Embedded Technologies).

Education

Indian Institute of Management Bangalore

PGSEM(Post Graduate Software Enterprise Management) — Marketing

Jan 2012Jan 2015

Indian Institute of Technology, Kanpur

B.Tech — Electrical Engineering

Jan 2002Jan 2006

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