Sumit Dalal

Software Engineer

Toronto, Ontario, Canada11 yrs 8 mos experience

Highly Stable

Key Highlights

Expert in Functional Verification methodologies.
Extensive experience in PCIe and CXL technologies.
Proficient in Universal Verification Methodology (UVM).

Stackforce AI infers this person is a VLSI verification engineer with expertise in ASIC design and functional verification.

Contact

Skills

Core Skills

Functional Verification

Other Skills

ASICCXLDebuggingEDAPCIeSoCSystemVerilogTCLUniversal Verification Methodology (UVM)VLSIVerilog

About

.

Experience

Amd

SMTS Silicon Design Engineer

Aug 2023 – Present · 2 yrs 7 mos

Synopsys inc

6 roles

R&D Engineer, Sr Staff

Feb 2023 – Aug 2023 · 6 mos

CXL & PCIe functional verification

Universal Verification Methodology (UVM)Functional Verification

R&D Engineer, Staff

Nov 2020 – Feb 2023 · 2 yrs 3 mos

Universal Verification Methodology (UVM)Functional Verification

Senior R&D II

Jun 2018 – Nov 2020 · 2 yrs 5 mos

Universal Verification Methodology (UVM)Functional Verification

Senior R&D

Jun 2016 – May 2018 · 1 yr 11 mos

Universal Verification Methodology (UVM)Functional Verification

R&D- II Engineer

Jun 2014 – May 2016 · 1 yr 11 mos

Universal Verification Methodology (UVM)Functional Verification

R&D - I Engineer

Sep 2011 – May 2014 · 2 yrs 8 mos

Development of PCIe VIP

Universal Verification Methodology (UVM)Functional Verification

Education

Bharti Vidyapeeth College Of Engineering

Bachelor of Technology (BTech) — Electronics and Communications Engineering

Jan 2007 – Jan 2011

The Air Force School New Delhi

The Air Force School, New Delhi

Stackforce found 100+ more professionals with Functional Verification

Explore similar profiles based on matching skills and experience

Sudhir Kumar (Aggarwal)

Senior Director R&D

at Synopsys Inc

India21 yrs 6 mos exp

Deepali M.

Accumulated Expertise

at Career-Wide Experience

Germany0 mo exp

Harjot Singh Kamboj

Senior Design Verification Engineer

at Micron Technology

Hyderabad, India8 yrs 6 mos exp

FPGA Development

Sudheer Reddy

Senior Silicon Design Engineer

at AMD

Bengaluru, India6 yrs 10 mos exp

Jaya Jagadish

Senior Vice President Silicon Design Engineering

at AMD

Bengaluru, India31 yrs 3 mos exp

Dharmesh Gurjar

Senior Design Verification Engineer

at Qualcomm

Surat, India6 yrs exp

Krati Agrawal

Performance Architect

at Meta

Austin, United States8 yrs 7 mos exp

Computer Architecture

Ravinjay Tiwari

Technical Lead

at eInfochips (An Arrow Company)

Ahmedabad, India11 yrs 3 mos exp