M

Mayank Raj

CEO

San Jose, California, United States16 yrs 8 mos experience
Most Likely To SwitchHighly Stable

Key Highlights

  • Expert in mixed-signal integrated circuit design.
  • Leadership role in silicon design at AMD.
  • Active contributor to IEEE technical committees.
Stackforce AI infers this person is a leader in semiconductor design and mixed-signal circuit engineering.

Contact

Skills

Core Skills

Mixed-signal Ic DesignSilicon Design

Other Skills

Injection Locked CircuitsPLLClock DistributionVCSELTransmitter EqualizationOn Chip Noise MeasurementMatlabSimulinkCadenceCICMixed SignalIntegrated Circuit DesignElectrical EngineeringElectronics

About

Specialties:Mixed-signal integrated circuit design. Photonic chip design. High‐performance mixed‐signal integrated circuits for high‐speed and low‐power optical and electrical chip to chip interconnects.

Experience

16 yrs 8 mos
Total Experience
6 yrs 9 mos
Average Tenure
11 yrs 3 mos
Current Experience

Amd

2 roles

AMD Fellow, Manager Silicon Design

Promoted

Jul 2024Present · 1 yr 10 mos

Mixed-Signal IC DesignSilicon Design

Senior Design Manager

Feb 2022Present · 4 yrs 3 mos

Mixed-Signal IC DesignSilicon Design

Xilinx

4 roles

Senior Design Manager

Promoted

Mar 2020Feb 2022 · 1 yr 11 mos

Mixed-Signal IC DesignSilicon Design

Senior Staff Design Engineer

Promoted

Jul 2018Mar 2020 · 1 yr 8 mos

Mixed-Signal IC DesignSilicon Design

Staff Design Engineer

Nov 2014Mar 2020 · 5 yrs 4 mos

Mixed-Signal IC DesignSilicon Design

Analog/Mixed Signal Intern

Jun 2012Aug 2012 · 2 mos · San Jose

Ieee custom integrated circuits conference

Member of Technical Program Committee

Aug 2017Present · 8 yrs 9 mos

  • Member of TPC for Wireline Subcommittee.
  • http://ieee-cicc.org/about-cicc/technical-committees/

Ieee journals

Invited Reviewer

Feb 2015Present · 11 yrs 3 mos

  • Frequent invited reviewer for following journals
  • IEEE Journal of Solid State Circuit (JSSC)
  • Journal of Lightwave Technology
  • IEEE Microwave and Wireless Components Letters
  • IEEE Transactions on Very Large Scale Integration (TVLSI)

Caltech

Phd Candidate

Sep 2009Nov 2014 · 5 yrs 2 mos · Pasadena, CA

Education

Caltech

Doctor of Philosophy (PhD) — Electrical and Electronics Engineering

Jan 2009Jan 2014

Caltech

Master of Science (M.S.) — Electrical and Electronics Engineering

Jan 2008Jan 2009

Indian Institute of Technology, Kanpur

Bachelor's Degree — Electrical and Electronics Engineering

Jan 2004Jan 2008

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