parul johari

Operations Associate

Bengaluru, Karnataka, India15 yrs 7 mos experience
Most Likely To SwitchHighly Stable

Key Highlights

  • Expert in SRAM circuit design and characterization.
  • Proven analytical skills and problem-solving abilities.
  • Experience across multiple technology nodes from 16nm to 180nm.
Stackforce AI infers this person is a Semiconductor Design Engineer with expertise in memory circuit design.

Contact

LinkedIn

Skills

Core Skills

Memory Circuit Design

Other Skills

SRAMDPRAMROMCircuit DesignTCLBashPerlCircuit AnalysisCharacterizationValidationDual Port SRAMLayoutCADdesign compilerSynopsys Primetime

About

Senior R&D Design engineer with experience in embedded memory (majorly SRAM) circuit design and characterization. Proven commitment to achieve objectives with astute analytical skills, problem solving and design / development attitude, supported with a dedication to meet challenging targets while ensuring quality standards. Experience in technology varying from 16nm to 180nm.

Experience

15 yrs 7 mos
Total Experience
3 yrs 10 mos
Average Tenure
11 yrs 5 mos
Current Experience

Synopsys inc

4 roles

Manager I, R & D

Promoted

Nov 2021 – Present · 4 yrs 6 mos

R & D Engineer, Sr II

Nov 2019 – Oct 2021 · 1 yr 11 mos

Circuit Design Engineer Sr I

Promoted

Jun 2016 – Oct 2019 · 3 yrs 4 mos

R & D engineer II

Sep 2014 – May 2016 · 1 yr 8 mos

Amd

Design Engineer

Jul 2013 – Sep 2014 · 1 yr 2 mos · Bengaluru, Karnataka, India

Interra systems

Memory Design Engineer

Jul 2012 – Jul 2013 · 1 yr · banglore

Rf silicon/logic fab ,sks law associates

Team Leader

Jun 2010 – Jun 2012 · 2 yrs · Noida, Uttar Pradesh, India

  • SRAM, DPRAM and ROM memory circuit design.

Education

Banasthali Vidyapith

M.Tech — VLSI DESIGN

Jan 2009 – Jan 2011

2008, Rajasthan University

B.E — Electronics & Communication

Jan 2004 – Jan 2008

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