suyog chutke — Software Engineer
Experince in ASIC verification and Mixed Signal verification. Experince of creating IP/SoC verification plan,verification environments,Testplan,Bus Functional Models. HDLs known : Verilog,SystemVerilog,VHDL Methodologies known : SV UVM Scripting languages : Perl Tools known: VCS,Modelsim,Quetasim,XA Waveform viewers : virsim,verdi Specialties: Having domain knowledge of DDR SDRAM memories.Have knowledge of DDR3/DDR4/LPDDR3/LPDDR4 physical layer and currently working on LPDDR4-PHY.
Stackforce AI infers this person is a VLSI and ASIC verification expert with a focus on memory technologies.
Location: Bengaluru, Karnataka, India
Experience: 19 yrs 3 mos
Skills
- Asic
- Mixed Signal
- Soc
Career Highlights
- Expert in ASIC and Mixed Signal verification.
- Proficient in creating verification plans and environments.
- Strong domain knowledge in DDR SDRAM memories.
Work Experience
Marvell Technology
Principal Engineer (4 yrs)
Staff Design Verification Engineer (3 yrs)
Self-employed
Options Trader (2 yrs)
MaxLinear
Staff ASIC Design Engineer (1 yr 9 mos)
Synopsys
ASIC Digital Design Engineer (2 yrs 9 mos)
AMD
Senior Design Engineer (1 yr 5 mos)
Aricent
Senior Verification Engineer (3 yrs 7 mos)
Aftek India
VLSI Engineer I (2 yrs 9 mos)
Education
PG Diploma at Indian Institute of Science (IISc)
PG Diploma in VLSI Design at CDAC
BE at College of engineering badnera
at Golden Kids English School
