Smriti Ojha — CTO

Micro-architecture and RTL design of High Performance/Low Power CPUs. Hands-on experience in processor Load Store Unit, Out-of-order Scheduler, Register Renaming/Dispatch, MMU/TLB, Virtualization, Multi-Threading, Cache Coherency and Memory Consistency. Functional verification of processor SoCs, architected and developed block level and full chip SV/OVM based verification environment from scratch. Post-silicon debug and bring-up. Key Strengths: Computer Architecture, RTL design, Timing, Power, Verilog/SV, OVM, C/C++

Stackforce AI infers this person is a Semiconductor Design Engineer with expertise in CPU architecture and verification.

Location: Santa Clara, California, United States

Experience: 15 yrs 1 mo