Jan 2024 – Jul 2024 · 6 mos · Bengaluru, Karnataka, India · On-site

• Worked on detecting and debugging frequency mismatches in Ring Oscillators (RO) caused by parasitic capacitances and stacked transistors, using silicon sensors in 5 nm and 3 nm technologies
• Conducted silicon correlation of frequency vs. Device Under Test (DUT) parameters in silicon sensors across various dies, resulting in a 15% improvement in modelling accuracy and a 10% reduction in testing time
• Developed python script for data visualizations using pivot plots and bar graphs
• Performed STA and RTL verification against Spice models, resolving three critical design issues to enhance accuracy and reduce verification time, ensuring IP compliance with SOC needs
• Studied about Temperature and LV sensors, Linear Bias Generators using Resistance Ladders and Transmission gates
• Technologies used: Cadence Virtuoso, HSPICE, Python

May 2023 – Jul 2023 · 2 mos · Odisha, India · On-site

• Designed a 3-tone, 2-command FPGA-based Tone Encoder for a mission-critical Ground Telecommand System and achieved a 50% reduction in hardware costs
• Significantly boosted data transmission speeds by an impressive 30%, enhancing operational efficiency and
• responsiveness
• Technologies used: Xilinx FPGA Virtex-4 board, Mixed Signal Oscilloscope, System Verilog HDL, Xilinx ISE