Shreyan Jain

Product Engineer

Delhi, India9 yrs 7 mos experience
Highly Stable

Key Highlights

  • Expert in Digital Design and VLSI design flow.
  • Strong background in power analysis and low power implementation.
  • Proficient in multiple programming languages and design tools.
Stackforce AI infers this person is a VLSI Design Engineer with expertise in power analysis and digital circuit design.

Contact

LinkedIn

Skills

Core Skills

Power AnalysisLow Power Implementation

Other Skills

Power IntentDynamic Power AnalysisLeakage Power AnalysisPTPXDigital Circuit DesignVerilogSemiconductorsC++SQLPythonAnalog Circuit DesignCadence VirtuosoPhysical designDesign CompilerFormality

About

Proficient in Digital Design, VLSI design flow and Digital circuits. Excellent time management and multi tasking skills

Experience

9 yrs 7 mos
Total Experience
2 yrs 6 mos
Average Tenure
1 yr 11 mos
Current Experience

Nvidia

Senior Applied Power Architect

May 2024 – Present · 1 yr 11 mos

Qualcomm

Lead Design Engineer

Jul 2018 – May 2024 · 5 yrs 10 mos · Noida Area, India

  • GPU Low Power Implementation Team. Working on Power Intent , CLP and Dynamic and Leakage Power Analysis with PTPX.
Power IntentDynamic Power AnalysisLeakage Power AnalysisPTPXPower AnalysisLow Power Implementation

Nxp semiconductors

Intern

Jul 2017 – Jun 2018 · 11 mos · Noida Area, India

Indraprastha institute of information technology, delhi

Teaching Assistant

Aug 2016 – Jul 2017 · 11 mos · New Delhi Area, India

Airport authority of india

Internship

Jun 2015 – Jun 2015 · 0 mo

  • Studied Automatic Message Switching System, Very High Frequency module and about L-Band RADAR.

Education

Indraprastha Institute of Information Technology, Delhi

Master of Technology (M.Tech.) — VLSI and Embedded Systems

Jan 2016 – Jan 2018

Bharati Vidyapeeth College of engineering,Delhi

Bachelor of Technology (BTech) — Electronics and Communications Engineering

Jan 2012 – Jan 2016

Ahlcon Public School

Jan 2002 – Jan 2012

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