P

Prakash Taksali

Engineering Manager

Bengaluru, Karnataka, India24 yrs 5 mos experience
Most Likely To SwitchHighly Stable

Key Highlights

  • Experienced in managing semiconductor validation teams.
  • Proficient in debugging and functional verification.
  • Strong background in embedded systems and architecture.
Stackforce AI infers this person is a Semiconductor Validation Expert with strong skills in debugging and embedded systems.

Contact

LinkedIn

Skills

Core Skills

Embedded SystemsDebuggingFunctional Verification

Other Skills

ProcessorsUnixARMCPerlDevice DriversASICVerilogEmbedded Linuxx86Computer ArchitectureX86

Experience

24 yrs 5 mos
Total Experience
4 yrs 10 mos
Average Tenure
5 yrs 7 mos
Current Experience

Intel corporation

Engineering Manager/System Validation Engineer

Oct 2020 – Present · 5 yrs 7 mos · Bangalore Urban, Karnataka, India

  • Managing and leading the Post-Si Coherency (Mesh)/RDT Team for Xeon/Xeon D product.
ProcessorsDebuggingEmbedded SystemsUnixARM

Ampere computing (formerly applied micro)

SMTS

Oct 2011 – Sep 2020 · 8 yrs 11 mos · Bangalore, India

  • Post silicon validation(Test plan, test framework development, multi threaded test development, post silicon debug using trace, PMU, RAS,) unit level verification of coherent mesh network, l3c, full chip verification of ARMv8 processor complex.
CPerlDevice DriversFunctional VerificationDebuggingEmbedded Systems+5

Amd

SSE

Sep 2007 – Sep 2011 · 4 yrs · Bangalore, India

  • Worked on x86 CPU validation.
DebuggingEmbedded Systemsx86

Ibm

SSE

May 2004 – Sep 2007 · 3 yrs 4 mos · Bangalore, India

  • Worked on PowerPC based system level stress tool.
DebuggingEmbedded Systems

Cdac r&d

MTS

Oct 2001 – May 2004 · 2 yrs 7 mos · Bangalore, India

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