K Durgadevi — Software Engineer

Experienced in Design Verification, have good knowledge in RTL design and verification. *Working on SMMU verification, low power interface(q channel). *MIPS Coherency Manager Verification Protocols: APB,AHB,AXI,ACE,MESI Skills: Digital Electronics, Verilog, System Verilog, UVM EDA Tools: Questasim, Visualizer, VCS, Verdi, Riverapro Aldec, DVE,Xilinx,Xcelium

Stackforce AI infers this person is a Semiconductor Verification Engineer with expertise in digital design and verification methodologies.

Location: Krishna, Andhra Pradesh, India

Experience: 7 yrs 5 mos