Sreevathsa Racharla — Product Engineer
Hello connections, I'm a Design and Verification Trainee at Maven Silicon currently looking for opportunities in the VLSI Domain. My skills include Digital Electronics, Verilog, System Verilog, UVM and AMBA Protocols(APB,AHB).
Stackforce AI infers this person is a VLSI Design and Verification Trainee with a focus on digital electronics.
Location: Bengaluru, Karnataka, India
Experience: 11 mos
Skills
- Systemverilog
- Universal Verification Methodology (uvm)
- Digital Designs
Career Highlights
- Currently a Design and Verification Trainee at Maven Silicon.
- Interned at Intel Corporation focusing on SoC Design Verification.
- Skills in Digital Electronics and Verification methodologies.
Work Experience
Intel Corporation
Soc Pre Silicon Verification Engineer (11 mos)
SoC Design Verification Intern (10 mos)
Maven Silicon
Verification Intern (3 mos)
Education
Master of Technology - MTech at Amrita School of Engineering, Bangalore
Design and Verification Trainee at Maven Silicon
Bachelor of Technology - BTech at PES University
